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[X86] Use hash table in LEA optimization pass.
Use hash table (key is a memory operand) to store found LEA instructions to reduce compile time. Differential Revision: http://reviews.llvm.org/D16404 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@259770 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrey Turetskiy
parent
125c5460fd
commit
be1b2fc159
@ -42,6 +42,133 @@ static cl::opt<bool> EnableX86LEAOpt("enable-x86-lea-opt", cl::Hidden,
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STATISTIC(NumSubstLEAs, "Number of LEA instruction substitutions");
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STATISTIC(NumRedundantLEAs, "Number of redundant LEA instructions removed");
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class MemOpKey;
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/// \brief Returns a hash table key based on memory operands of \p MI. The
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/// number of the first memory operand of \p MI is specified through \p N.
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static inline MemOpKey getMemOpKey(const MachineInstr &MI, unsigned N);
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/// \brief Returns true if two machine operands are identical and they are not
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/// physical registers.
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static inline bool isIdenticalOp(const MachineOperand &MO1,
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const MachineOperand &MO2);
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/// \brief Returns true if the instruction is LEA.
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static inline bool isLEA(const MachineInstr &MI);
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/// A key based on instruction's memory operands.
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class MemOpKey {
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public:
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MemOpKey(const MachineOperand *Base, const MachineOperand *Scale,
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const MachineOperand *Index, const MachineOperand *Segment,
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const MachineOperand *Disp)
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: Disp(Disp) {
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Operands[0] = Base;
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Operands[1] = Scale;
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Operands[2] = Index;
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Operands[3] = Segment;
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}
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bool operator==(const MemOpKey &Other) const {
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// Addresses' bases, scales, indices and segments must be identical.
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for (int i = 0; i < 4; ++i)
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if (!isIdenticalOp(*Operands[i], *Other.Operands[i]))
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return false;
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assert((Disp->isImm() || Disp->isGlobal()) &&
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(Other.Disp->isImm() || Other.Disp->isGlobal()) &&
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"Address displacement operand is always an immediate or a global");
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// Addresses' displacements must be either immediates or the same global.
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// Immediates' and offsets' values don't matter for the operator since the
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// difference will be taken care of during instruction substitution.
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if ((Disp->isImm() && Other.Disp->isImm()) ||
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(Disp->isGlobal() && Other.Disp->isGlobal() &&
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Disp->getGlobal() == Other.Disp->getGlobal()))
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return true;
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return false;
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}
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// Address' base, scale, index and segment operands.
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const MachineOperand *Operands[4];
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// Address' displacement operand.
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const MachineOperand *Disp;
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};
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/// Provide DenseMapInfo for MemOpKey.
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namespace llvm {
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template <> struct DenseMapInfo<MemOpKey> {
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typedef DenseMapInfo<const MachineOperand *> PtrInfo;
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static inline MemOpKey getEmptyKey() {
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return MemOpKey(PtrInfo::getEmptyKey(), PtrInfo::getEmptyKey(),
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PtrInfo::getEmptyKey(), PtrInfo::getEmptyKey(),
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PtrInfo::getEmptyKey());
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}
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static inline MemOpKey getTombstoneKey() {
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return MemOpKey(PtrInfo::getTombstoneKey(), PtrInfo::getTombstoneKey(),
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PtrInfo::getTombstoneKey(), PtrInfo::getTombstoneKey(),
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PtrInfo::getTombstoneKey());
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}
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static unsigned getHashValue(const MemOpKey &Val) {
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// Checking any field of MemOpKey is enough to determine if the key is
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// empty or tombstone.
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assert(Val.Disp != PtrInfo::getEmptyKey() && "Cannot hash the empty key");
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assert(Val.Disp != PtrInfo::getTombstoneKey() &&
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"Cannot hash the tombstone key");
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hash_code Hash = hash_combine(*Val.Operands[0], *Val.Operands[1],
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*Val.Operands[2], *Val.Operands[3]);
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// If the address displacement is an immediate, it should not affect the
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// hash so that memory operands which differ only be immediate displacement
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// would have the same hash. If the address displacement is a global, we
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// should reflect this global in the hash.
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if (Val.Disp->isGlobal())
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Hash = hash_combine(Hash, Val.Disp->getGlobal());
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return (unsigned)Hash;
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}
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static bool isEqual(const MemOpKey &LHS, const MemOpKey &RHS) {
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// Checking any field of MemOpKey is enough to determine if the key is
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// empty or tombstone.
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if (RHS.Disp == PtrInfo::getEmptyKey())
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return LHS.Disp == PtrInfo::getEmptyKey();
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if (RHS.Disp == PtrInfo::getTombstoneKey())
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return LHS.Disp == PtrInfo::getTombstoneKey();
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return LHS == RHS;
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}
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};
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}
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static inline MemOpKey getMemOpKey(const MachineInstr &MI, unsigned N) {
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assert((isLEA(MI) || MI.mayLoadOrStore()) &&
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"The instruction must be a LEA, a load or a store");
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return MemOpKey(&MI.getOperand(N + X86::AddrBaseReg),
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&MI.getOperand(N + X86::AddrScaleAmt),
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&MI.getOperand(N + X86::AddrIndexReg),
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&MI.getOperand(N + X86::AddrSegmentReg),
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&MI.getOperand(N + X86::AddrDisp));
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}
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static inline bool isIdenticalOp(const MachineOperand &MO1,
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const MachineOperand &MO2) {
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return MO1.isIdenticalTo(MO2) &&
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(!MO1.isReg() ||
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!TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
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}
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static inline bool isLEA(const MachineInstr &MI) {
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unsigned Opcode = MI.getOpcode();
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return Opcode == X86::LEA16r || Opcode == X86::LEA32r ||
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Opcode == X86::LEA64r || Opcode == X86::LEA64_32r;
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}
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namespace {
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class OptimizeLEAPass : public MachineFunctionPass {
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public:
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@ -55,51 +182,43 @@ public:
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bool runOnMachineFunction(MachineFunction &MF) override;
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private:
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typedef DenseMap<MemOpKey, SmallVector<MachineInstr *, 16>> MemOpMap;
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/// \brief Returns a distance between two instructions inside one basic block.
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/// Negative result means, that instructions occur in reverse order.
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int calcInstrDist(const MachineInstr &First, const MachineInstr &Last);
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/// \brief Choose the best \p LEA instruction from the \p List to replace
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/// address calculation in \p MI instruction. Return the address displacement
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/// and the distance between \p MI and the choosen \p LEA in \p AddrDispShift
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/// and \p Dist.
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/// and the distance between \p MI and the choosen \p BestLEA in
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/// \p AddrDispShift and \p Dist.
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bool chooseBestLEA(const SmallVectorImpl<MachineInstr *> &List,
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const MachineInstr &MI, MachineInstr *&LEA,
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const MachineInstr &MI, MachineInstr *&BestLEA,
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int64_t &AddrDispShift, int &Dist);
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/// \brief Returns true if two machine operand are identical and they are not
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/// physical registers.
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bool isIdenticalOp(const MachineOperand &MO1, const MachineOperand &MO2);
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/// \brief Returns true if the instruction is LEA.
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bool isLEA(const MachineInstr &MI);
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/// \brief Returns the difference between addresses' displacements of \p MI1
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/// and \p MI2. The numbers of the first memory operands for the instructions
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/// are specified through \p N1 and \p N2.
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int64_t getAddrDispShift(const MachineInstr &MI1, unsigned N1,
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const MachineInstr &MI2, unsigned N2) const;
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/// \brief Returns true if the \p Last LEA instruction can be replaced by the
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/// \p First. The difference between displacements of the addresses calculated
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/// by these LEAs is returned in \p AddrDispShift. It'll be used for proper
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/// replacement of the \p Last LEA's uses with the \p First's def register.
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bool isReplaceable(const MachineInstr &First, const MachineInstr &Last,
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int64_t &AddrDispShift);
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/// \brief Returns true if two instructions have memory operands that only
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/// differ by displacement. The numbers of the first memory operands for both
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/// instructions are specified through \p N1 and \p N2. The address
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/// displacement is returned through AddrDispShift.
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bool isSimilarMemOp(const MachineInstr &MI1, unsigned N1,
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const MachineInstr &MI2, unsigned N2,
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int64_t &AddrDispShift);
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int64_t &AddrDispShift) const;
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/// \brief Find all LEA instructions in the basic block. Also, assign position
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/// numbers to all instructions in the basic block to speed up calculation of
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/// distance between them.
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void findLEAs(const MachineBasicBlock &MBB,
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SmallVectorImpl<MachineInstr *> &List);
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void findLEAs(const MachineBasicBlock &MBB, MemOpMap &LEAs);
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/// \brief Removes redundant address calculations.
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bool removeRedundantAddrCalc(const SmallVectorImpl<MachineInstr *> &List);
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bool removeRedundantAddrCalc(MemOpMap &LEAs);
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/// \brief Removes LEAs which calculate similar addresses.
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bool removeRedundantLEAs(SmallVectorImpl<MachineInstr *> &List);
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bool removeRedundantLEAs(MemOpMap &LEAs);
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DenseMap<const MachineInstr *, unsigned> InstrPos;
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@ -137,22 +256,20 @@ int OptimizeLEAPass::calcInstrDist(const MachineInstr &First,
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// 4) The LEA should be as close to MI as possible, and prior to it if
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// possible.
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bool OptimizeLEAPass::chooseBestLEA(const SmallVectorImpl<MachineInstr *> &List,
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const MachineInstr &MI, MachineInstr *&LEA,
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const MachineInstr &MI,
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MachineInstr *&BestLEA,
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int64_t &AddrDispShift, int &Dist) {
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const MachineFunction *MF = MI.getParent()->getParent();
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const MCInstrDesc &Desc = MI.getDesc();
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int MemOpNo = X86II::getMemoryOperandNo(Desc.TSFlags, MI.getOpcode()) +
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X86II::getOperandBias(Desc);
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LEA = nullptr;
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BestLEA = nullptr;
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// Loop over all LEA instructions.
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for (auto DefMI : List) {
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int64_t AddrDispShiftTemp = 0;
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// Compare instructions memory operands.
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if (!isSimilarMemOp(MI, MemOpNo, *DefMI, 1, AddrDispShiftTemp))
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continue;
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// Get new address displacement.
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int64_t AddrDispShiftTemp = getAddrDispShift(MI, MemOpNo, *DefMI, 1);
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// Make sure address displacement fits 4 bytes.
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if (!isInt<32>(AddrDispShiftTemp))
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@ -174,14 +291,14 @@ bool OptimizeLEAPass::chooseBestLEA(const SmallVectorImpl<MachineInstr *> &List,
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int DistTemp = calcInstrDist(*DefMI, MI);
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assert(DistTemp != 0 &&
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"The distance between two different instructions cannot be zero");
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if (DistTemp > 0 || LEA == nullptr) {
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if (DistTemp > 0 || BestLEA == nullptr) {
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// Do not update return LEA, if the current one provides a displacement
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// which fits in 1 byte, while the new candidate does not.
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if (LEA != nullptr && !isInt<8>(AddrDispShiftTemp) &&
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if (BestLEA != nullptr && !isInt<8>(AddrDispShiftTemp) &&
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isInt<8>(AddrDispShift))
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continue;
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LEA = DefMI;
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BestLEA = DefMI;
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AddrDispShift = AddrDispShiftTemp;
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Dist = DistTemp;
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}
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@ -191,20 +308,25 @@ bool OptimizeLEAPass::chooseBestLEA(const SmallVectorImpl<MachineInstr *> &List,
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break;
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}
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return LEA != nullptr;
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return BestLEA != nullptr;
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}
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bool OptimizeLEAPass::isIdenticalOp(const MachineOperand &MO1,
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const MachineOperand &MO2) {
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return MO1.isIdenticalTo(MO2) &&
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(!MO1.isReg() ||
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!TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
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}
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bool OptimizeLEAPass::isLEA(const MachineInstr &MI) {
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unsigned Opcode = MI.getOpcode();
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return Opcode == X86::LEA16r || Opcode == X86::LEA32r ||
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Opcode == X86::LEA64r || Opcode == X86::LEA64_32r;
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// Get the difference between the addresses' displacements of the two
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// instructions \p MI1 and \p MI2. The numbers of the first memory operands are
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// passed through \p N1 and \p N2.
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int64_t OptimizeLEAPass::getAddrDispShift(const MachineInstr &MI1, unsigned N1,
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const MachineInstr &MI2,
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unsigned N2) const {
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// Address displacement operands may differ by a constant.
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const MachineOperand &Op1 = MI1.getOperand(N1 + X86::AddrDisp);
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const MachineOperand &Op2 = MI2.getOperand(N2 + X86::AddrDisp);
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if (Op1.isImm() && Op2.isImm())
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return Op1.getImm() - Op2.getImm();
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else if (Op1.isGlobal() && Op2.isGlobal() &&
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Op1.getGlobal() == Op2.getGlobal())
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return Op1.getOffset() - Op2.getOffset();
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else
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llvm_unreachable("Invalid address displacement operand");
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}
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// Check that the Last LEA can be replaced by the First LEA. To be so,
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@ -215,13 +337,12 @@ bool OptimizeLEAPass::isLEA(const MachineInstr &MI) {
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// register is used only as address base.
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bool OptimizeLEAPass::isReplaceable(const MachineInstr &First,
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const MachineInstr &Last,
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int64_t &AddrDispShift) {
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int64_t &AddrDispShift) const {
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assert(isLEA(First) && isLEA(Last) &&
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"The function works only with LEA instructions");
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// Compare instructions' memory operands.
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if (!isSimilarMemOp(Last, 1, First, 1, AddrDispShift))
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return false;
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// Get new address displacement.
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AddrDispShift = getAddrDispShift(Last, 1, First, 1);
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// Make sure that LEA def registers belong to the same class. There may be
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// instructions (like MOV8mr_NOREX) which allow a limited set of registers to
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@ -270,36 +391,7 @@ bool OptimizeLEAPass::isReplaceable(const MachineInstr &First,
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return true;
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}
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// Check if MI1 and MI2 have memory operands which represent addresses that
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// differ only by displacement.
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bool OptimizeLEAPass::isSimilarMemOp(const MachineInstr &MI1, unsigned N1,
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const MachineInstr &MI2, unsigned N2,
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int64_t &AddrDispShift) {
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// Address base, scale, index and segment operands must be identical.
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static const int IdenticalOpNums[] = {X86::AddrBaseReg, X86::AddrScaleAmt,
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X86::AddrIndexReg, X86::AddrSegmentReg};
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for (auto &N : IdenticalOpNums)
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if (!isIdenticalOp(MI1.getOperand(N1 + N), MI2.getOperand(N2 + N)))
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return false;
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// Address displacement operands may differ by a constant.
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const MachineOperand *Op1 = &MI1.getOperand(N1 + X86::AddrDisp);
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const MachineOperand *Op2 = &MI2.getOperand(N2 + X86::AddrDisp);
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if (!isIdenticalOp(*Op1, *Op2)) {
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if (Op1->isImm() && Op2->isImm())
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AddrDispShift = Op1->getImm() - Op2->getImm();
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else if (Op1->isGlobal() && Op2->isGlobal() &&
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Op1->getGlobal() == Op2->getGlobal())
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AddrDispShift = Op1->getOffset() - Op2->getOffset();
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else
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return false;
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}
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return true;
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}
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void OptimizeLEAPass::findLEAs(const MachineBasicBlock &MBB,
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SmallVectorImpl<MachineInstr *> &List) {
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void OptimizeLEAPass::findLEAs(const MachineBasicBlock &MBB, MemOpMap &LEAs) {
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unsigned Pos = 0;
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for (auto &MI : MBB) {
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// Assign the position number to the instruction. Note that we are going to
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@ -310,19 +402,18 @@ void OptimizeLEAPass::findLEAs(const MachineBasicBlock &MBB,
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InstrPos[&MI] = Pos += 2;
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if (isLEA(MI))
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List.push_back(const_cast<MachineInstr *>(&MI));
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LEAs[getMemOpKey(MI, 1)].push_back(const_cast<MachineInstr *>(&MI));
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}
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}
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// Try to find load and store instructions which recalculate addresses already
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// calculated by some LEA and replace their memory operands with its def
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// register.
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bool OptimizeLEAPass::removeRedundantAddrCalc(
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const SmallVectorImpl<MachineInstr *> &List) {
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bool OptimizeLEAPass::removeRedundantAddrCalc(MemOpMap &LEAs) {
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bool Changed = false;
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assert(List.size() > 0);
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MachineBasicBlock *MBB = List[0]->getParent();
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assert(!LEAs.empty());
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MachineBasicBlock *MBB = (*LEAs.begin()->second.begin())->getParent();
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// Process all instructions in basic block.
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for (auto I = MBB->begin(), E = MBB->end(); I != E;) {
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@ -347,7 +438,8 @@ bool OptimizeLEAPass::removeRedundantAddrCalc(
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MachineInstr *DefMI;
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int64_t AddrDispShift;
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int Dist;
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if (!chooseBestLEA(List, MI, DefMI, AddrDispShift, Dist))
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if (!chooseBestLEA(LEAs[getMemOpKey(MI, MemOpNo)], MI, DefMI, AddrDispShift,
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Dist))
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continue;
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// If LEA occurs before current instruction, we can freely replace
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@ -393,75 +485,80 @@ bool OptimizeLEAPass::removeRedundantAddrCalc(
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}
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// Try to find similar LEAs in the list and replace one with another.
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bool
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OptimizeLEAPass::removeRedundantLEAs(SmallVectorImpl<MachineInstr *> &List) {
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bool OptimizeLEAPass::removeRedundantLEAs(MemOpMap &LEAs) {
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bool Changed = false;
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// Loop over all LEA pairs.
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auto I1 = List.begin();
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while (I1 != List.end()) {
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MachineInstr &First = **I1;
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auto I2 = std::next(I1);
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while (I2 != List.end()) {
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MachineInstr &Last = **I2;
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int64_t AddrDispShift;
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// Loop over all entries in the table.
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for (auto &E : LEAs) {
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auto &List = E.second;
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// LEAs should be in occurence order in the list, so we can freely
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// replace later LEAs with earlier ones.
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assert(calcInstrDist(First, Last) > 0 &&
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"LEAs must be in occurence order in the list");
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// Loop over all LEA pairs.
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auto I1 = List.begin();
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while (I1 != List.end()) {
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MachineInstr &First = **I1;
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auto I2 = std::next(I1);
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while (I2 != List.end()) {
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MachineInstr &Last = **I2;
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int64_t AddrDispShift;
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// Check that the Last LEA instruction can be replaced by the First.
|
||||
if (!isReplaceable(First, Last, AddrDispShift)) {
|
||||
++I2;
|
||||
continue;
|
||||
// LEAs should be in occurence order in the list, so we can freely
|
||||
// replace later LEAs with earlier ones.
|
||||
assert(calcInstrDist(First, Last) > 0 &&
|
||||
"LEAs must be in occurence order in the list");
|
||||
|
||||
// Check that the Last LEA instruction can be replaced by the First.
|
||||
if (!isReplaceable(First, Last, AddrDispShift)) {
|
||||
++I2;
|
||||
continue;
|
||||
}
|
||||
|
||||
// Loop over all uses of the Last LEA and update their operands. Note
|
||||
// that the correctness of this has already been checked in the
|
||||
// isReplaceable function.
|
||||
for (auto UI = MRI->use_begin(Last.getOperand(0).getReg()),
|
||||
UE = MRI->use_end();
|
||||
UI != UE;) {
|
||||
MachineOperand &MO = *UI++;
|
||||
MachineInstr &MI = *MO.getParent();
|
||||
|
||||
// Get the number of the first memory operand.
|
||||
const MCInstrDesc &Desc = MI.getDesc();
|
||||
int MemOpNo =
|
||||
X86II::getMemoryOperandNo(Desc.TSFlags, MI.getOpcode()) +
|
||||
X86II::getOperandBias(Desc);
|
||||
|
||||
// Update address base.
|
||||
MO.setReg(First.getOperand(0).getReg());
|
||||
|
||||
// Update address disp.
|
||||
MachineOperand *Op = &MI.getOperand(MemOpNo + X86::AddrDisp);
|
||||
if (Op->isImm())
|
||||
Op->setImm(Op->getImm() + AddrDispShift);
|
||||
else if (Op->isGlobal())
|
||||
Op->setOffset(Op->getOffset() + AddrDispShift);
|
||||
else
|
||||
llvm_unreachable("Invalid address displacement operand");
|
||||
}
|
||||
|
||||
// Since we can possibly extend register lifetime, clear kill flags.
|
||||
MRI->clearKillFlags(First.getOperand(0).getReg());
|
||||
|
||||
++NumRedundantLEAs;
|
||||
DEBUG(dbgs() << "OptimizeLEAs: Remove redundant LEA: "; Last.dump(););
|
||||
|
||||
// By this moment, all of the Last LEA's uses must be replaced. So we
|
||||
// can freely remove it.
|
||||
assert(MRI->use_empty(Last.getOperand(0).getReg()) &&
|
||||
"The LEA's def register must have no uses");
|
||||
Last.eraseFromParent();
|
||||
|
||||
// Erase removed LEA from the list.
|
||||
I2 = List.erase(I2);
|
||||
|
||||
Changed = true;
|
||||
}
|
||||
|
||||
// Loop over all uses of the Last LEA and update their operands. Note that
|
||||
// the correctness of this has already been checked in the isReplaceable
|
||||
// function.
|
||||
for (auto UI = MRI->use_begin(Last.getOperand(0).getReg()),
|
||||
UE = MRI->use_end();
|
||||
UI != UE;) {
|
||||
MachineOperand &MO = *UI++;
|
||||
MachineInstr &MI = *MO.getParent();
|
||||
|
||||
// Get the number of the first memory operand.
|
||||
const MCInstrDesc &Desc = MI.getDesc();
|
||||
int MemOpNo = X86II::getMemoryOperandNo(Desc.TSFlags, MI.getOpcode()) +
|
||||
X86II::getOperandBias(Desc);
|
||||
|
||||
// Update address base.
|
||||
MO.setReg(First.getOperand(0).getReg());
|
||||
|
||||
// Update address disp.
|
||||
MachineOperand *Op = &MI.getOperand(MemOpNo + X86::AddrDisp);
|
||||
if (Op->isImm())
|
||||
Op->setImm(Op->getImm() + AddrDispShift);
|
||||
else if (Op->isGlobal())
|
||||
Op->setOffset(Op->getOffset() + AddrDispShift);
|
||||
else
|
||||
llvm_unreachable("Invalid address displacement operand");
|
||||
}
|
||||
|
||||
// Since we can possibly extend register lifetime, clear kill flags.
|
||||
MRI->clearKillFlags(First.getOperand(0).getReg());
|
||||
|
||||
++NumRedundantLEAs;
|
||||
DEBUG(dbgs() << "OptimizeLEAs: Remove redundant LEA: "; Last.dump(););
|
||||
|
||||
// By this moment, all of the Last LEA's uses must be replaced. So we can
|
||||
// freely remove it.
|
||||
assert(MRI->use_empty(Last.getOperand(0).getReg()) &&
|
||||
"The LEA's def register must have no uses");
|
||||
Last.eraseFromParent();
|
||||
|
||||
// Erase removed LEA from the list.
|
||||
I2 = List.erase(I2);
|
||||
|
||||
Changed = true;
|
||||
++I1;
|
||||
}
|
||||
++I1;
|
||||
}
|
||||
|
||||
return Changed;
|
||||
@ -480,7 +577,7 @@ bool OptimizeLEAPass::runOnMachineFunction(MachineFunction &MF) {
|
||||
|
||||
// Process all basic blocks.
|
||||
for (auto &MBB : MF) {
|
||||
SmallVector<MachineInstr *, 16> LEAs;
|
||||
MemOpMap LEAs;
|
||||
InstrPos.clear();
|
||||
|
||||
// Find all LEA instructions in basic block.
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user