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[X86][SSE] Regenerated SSE4 CRC32 and v2i64 comparison tests

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257996 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim 2016-01-16 15:41:42 +00:00
parent be30412515
commit bf01fa3aaf
2 changed files with 92 additions and 42 deletions
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53
test/CodeGen/X86/sse42.ll
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@ -1,39 +1,58 @@
; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse4.2 | FileCheck %s -check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse4.2 | FileCheck %s -check-prefix=X64
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse4.2 | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse4.2 | FileCheck %s --check-prefix=X64
declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind
declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind
declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind
define i32 @crc32_32_8(i32 %a, i8 %b) nounwind {
; X32-LABEL: crc32_32_8:
; X32: ## BB#0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: crc32b {{[0-9]+}}(%esp), %eax
; X32-NEXT: retl
;
; X64-LABEL: crc32_32_8:
; X64: ## BB#0:
; X64-NEXT: crc32b %sil, %edi
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
%tmp = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a, i8 %b)
ret i32 %tmp
; X32: _crc32_32_8:
; X32: crc32b 8(%esp), %eax
; X64: _crc32_32_8:
; X64: crc32b %sil,
}
define i32 @crc32_32_16(i32 %a, i16 %b) nounwind {
; X32-LABEL: crc32_32_16:
; X32: ## BB#0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: crc32w {{[0-9]+}}(%esp), %eax
; X32-NEXT: retl
;
; X64-LABEL: crc32_32_16:
; X64: ## BB#0:
; X64-NEXT: crc32w %si, %edi
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
%tmp = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a, i16 %b)
ret i32 %tmp
; X32: _crc32_32_16:
; X32: crc32w 8(%esp), %eax
; X64: _crc32_32_16:
; X64: crc32w %si,
}
define i32 @crc32_32_32(i32 %a, i32 %b) nounwind {
; X32-LABEL: crc32_32_32:
; X32: ## BB#0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: crc32l {{[0-9]+}}(%esp), %eax
; X32-NEXT: retl
;
; X64-LABEL: crc32_32_32:
; X64: ## BB#0:
; X64-NEXT: crc32l %esi, %edi
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
%tmp = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a, i32 %b)
ret i32 %tmp
; X32: _crc32_32_32:
; X32: crc32l 8(%esp), %eax
; X64: _crc32_32_32:
; X64: crc32l %esi,
}

81
test/CodeGen/X86/vec_compare-sse4.ll
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@ -1,35 +1,66 @@
; RUN: llc < %s -march=x86 -mattr=-sse3,+sse2 | FileCheck %s -check-prefix=SSE2
; RUN: llc < %s -march=x86 -mattr=-sse4.2,+sse4.1 | FileCheck %s -check-prefix=SSE41
; RUN: llc < %s -march=x86 -mattr=+sse4.2 | FileCheck %s -check-prefix=SSE42
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=-sse3,+sse2 | FileCheck %s --check-prefix=SSE2
; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=-sse4.2,+sse4.1 | FileCheck %s --check-prefix=SSE41
; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE42
define <2 x i64> @test1(<2 x i64> %A, <2 x i64> %B) nounwind {
; SSE42-LABEL: test1:
; SSE42: pcmpgtq
; SSE42: ret
; SSE41-LABEL: test1:
; SSE41-NOT: pcmpgtq
; SSE41: ret
; SSE2-LABEL: test1:
; SSE2-NOT: pcmpgtq
; SSE2: ret
%C = icmp sgt <2 x i64> %A, %B
; SSE2: ## BB#0:
; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,0,2147483648,0]
; SSE2-NEXT: pxor %xmm2, %xmm1
; SSE2-NEXT: pxor %xmm2, %xmm0
; SSE2-NEXT: movdqa %xmm0, %xmm2
; SSE2-NEXT: pcmpgtd %xmm1, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
; SSE2-NEXT: pand %xmm3, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3]
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: retl
;
; SSE41-LABEL: test1:
; SSE41: ## BB#0:
; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,0,2147483648,0]
; SSE41-NEXT: pxor %xmm2, %xmm1
; SSE41-NEXT: pxor %xmm2, %xmm0
; SSE41-NEXT: movdqa %xmm0, %xmm2
; SSE41-NEXT: pcmpgtd %xmm1, %xmm2
; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
; SSE41-NEXT: pcmpeqd %xmm1, %xmm0
; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
; SSE41-NEXT: pand %xmm3, %xmm1
; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3]
; SSE41-NEXT: por %xmm1, %xmm0
; SSE41-NEXT: retl
;
; SSE42-LABEL: test1:
; SSE42: ## BB#0:
; SSE42-NEXT: pcmpgtq %xmm1, %xmm0
; SSE42-NEXT: retl
%C = icmp sgt <2 x i64> %A, %B
%D = sext <2 x i1> %C to <2 x i64>
ret <2 x i64> %D
ret <2 x i64> %D
}
define <2 x i64> @test2(<2 x i64> %A, <2 x i64> %B) nounwind {
; SSE42-LABEL: test2:
; SSE42: pcmpeqq
; SSE42: ret
; SSE41-LABEL: test2:
; SSE41: pcmpeqq
; SSE41: ret
; SSE2-LABEL: test2:
; SSE2-NOT: pcmpeqq
; SSE2: ret
%C = icmp eq <2 x i64> %A, %B
; SSE2: ## BB#0:
; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
; SSE2-NEXT: pand %xmm1, %xmm0
; SSE2-NEXT: retl
;
; SSE41-LABEL: test2:
; SSE41: ## BB#0:
; SSE41-NEXT: pcmpeqq %xmm1, %xmm0
; SSE41-NEXT: retl
;
; SSE42-LABEL: test2:
; SSE42: ## BB#0:
; SSE42-NEXT: pcmpeqq %xmm1, %xmm0
; SSE42-NEXT: retl
%C = icmp eq <2 x i64> %A, %B
%D = sext <2 x i1> %C to <2 x i64>
ret <2 x i64> %D
ret <2 x i64> %D
}