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Allow more cross-rc coalescing.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98048 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2010-03-09 06:38:17 +00:00
parent c608784dc8
commit bfc9999563
1 changed files with 13 additions and 10 deletions
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23
lib/CodeGen/MachineCSE.cpp
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@ -93,16 +93,19 @@ bool MachineCSE::PerformTrivialCoalescing(MachineInstr *MI,
if (TII->isMoveInstr(*DefMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) &&
TargetRegisterInfo::isVirtualRegister(SrcReg) &&
!SrcSubIdx && !DstSubIdx) {
const TargetRegisterClass *SRC = MRI->getRegClass(SrcReg);
const TargetRegisterClass *RC = MRI->getRegClass(Reg);
if (SRC == RC || RC->hasSubClass(SRC)) {
DEBUG(dbgs() << "Coalescing: " << *DefMI);
DEBUG(dbgs() << "*** to: " << *MI);
MO.setReg(SrcReg);
DefMI->eraseFromParent();
++NumCoalesces;
Changed = true;
}
const TargetRegisterClass *SRC = MRI->getRegClass(SrcReg);
const TargetRegisterClass *RC = MRI->getRegClass(Reg);
const TargetRegisterClass *NewRC = getCommonSubClass(RC, SRC);
if (!NewRC)
continue;
DEBUG(dbgs() << "Coalescing: " << *DefMI);
DEBUG(dbgs() << "*** to: " << *MI);
MO.setReg(SrcReg);
if (NewRC != SRC)
MRI->setRegClass(SrcReg, NewRC);
DefMI->eraseFromParent();
++NumCoalesces;
Changed = true;
}
}