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revert r106482
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106499 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -444,22 +444,6 @@ multiclass sse12_fp_packed_int<bits<8> opc, string OpcodeStr, RegisterClass RC,
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RC:$src1, (mem_frag addr:$src2)))], d>;
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}
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/// sse12_unpack_interleave - SSE 1 & 2 unpack and interleave
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multiclass sse12_unpack_interleave<bits<8> opc, PatFrag OpNode, ValueType vt,
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PatFrag mem_frag, RegisterClass RC,
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X86MemOperand x86memop, string asm,
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Domain d> {
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def rr : PI<opc, MRMSrcReg,
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(outs RC:$dst), (ins RC:$src1, RC:$src2),
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asm, [(set RC:$dst,
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(vt (OpNode RC:$src1, RC:$src2)))], d>;
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def rm : PI<opc, MRMSrcMem,
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(outs RC:$dst), (ins RC:$src1, x86memop:$src2),
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asm, [(set RC:$dst,
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(vt (OpNode RC:$src1,
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(mem_frag addr:$src2))))], d>;
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}
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//===----------------------------------------------------------------------===//
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// SSE1 Instructions
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//===----------------------------------------------------------------------===//
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@ -1217,32 +1201,50 @@ let Constraints = "$src1 = $dst" in {
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VR128:$src1, (memopv2f64 addr:$src2))))]>;
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let AddedComplexity = 10 in {
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let Constraints = "", isAsmParserOnly = 1 in {
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defm VUNPCKHPS: sse12_unpack_interleave<0x15, unpckh, v4f32, memopv4f32,
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VR128, f128mem, "unpckhps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
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SSEPackedSingle>, VEX_4V;
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defm VUNPCKHPD: sse12_unpack_interleave<0x15, unpckh, v2f64, memopv2f64,
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VR128, f128mem, "unpckhpd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
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SSEPackedDouble>, OpSize, VEX_4V;
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defm VUNPCKLPS: sse12_unpack_interleave<0x14, unpckl, v4f32, memopv4f32,
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VR128, f128mem, "unpcklps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
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SSEPackedSingle>, VEX_4V;
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defm VUNPCKLPD: sse12_unpack_interleave<0x14, unpckl, v2f64, memopv2f64,
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VR128, f128mem, "unpcklpd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
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SSEPackedDouble>, OpSize, VEX_4V;
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}
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defm UNPCKHPS: sse12_unpack_interleave<0x15, unpckh, v4f32, memopv4f32,
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VR128, f128mem, "unpckhps\t{$src2, $dst|$dst, $src2}",
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SSEPackedSingle>, TB;
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defm UNPCKHPD: sse12_unpack_interleave<0x15, unpckh, v2f64, memopv2f64,
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VR128, f128mem, "unpckhpd\t{$src2, $dst|$dst, $src2}",
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SSEPackedDouble>, TB, OpSize;
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defm UNPCKLPS: sse12_unpack_interleave<0x14, unpckl, v4f32, memopv4f32,
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VR128, f128mem, "unpcklps\t{$src2, $dst|$dst, $src2}",
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SSEPackedSingle>, TB;
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defm UNPCKLPD: sse12_unpack_interleave<0x14, unpckl, v2f64, memopv2f64,
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VR128, f128mem, "unpcklpd\t{$src2, $dst|$dst, $src2}",
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SSEPackedDouble>, TB, OpSize;
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def UNPCKHPSrr : PSI<0x15, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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"unpckhps\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(v4f32 (unpckh VR128:$src1, VR128:$src2)))]>;
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def UNPCKHPSrm : PSI<0x15, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src2),
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"unpckhps\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(v4f32 (unpckh VR128:$src1,
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(memopv4f32 addr:$src2))))]>;
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def UNPCKLPSrr : PSI<0x14, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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"unpcklps\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(v4f32 (unpckl VR128:$src1, VR128:$src2)))]>;
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def UNPCKLPSrm : PSI<0x14, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src2),
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"unpcklps\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(unpckl VR128:$src1, (memopv4f32 addr:$src2)))]>;
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def UNPCKHPDrr : PDI<0x15, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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"unpckhpd\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(v2f64 (unpckh VR128:$src1, VR128:$src2)))]>;
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def UNPCKHPDrm : PDI<0x15, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src2),
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"unpckhpd\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(v2f64 (unpckh VR128:$src1,
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(memopv2f64 addr:$src2))))]>;
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def UNPCKLPDrr : PDI<0x14, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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"unpcklpd\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(v2f64 (unpckl VR128:$src1, VR128:$src2)))]>;
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def UNPCKLPDrm : PDI<0x14, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src2),
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"unpcklpd\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst,
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(unpckl VR128:$src1, (memopv2f64 addr:$src2)))]>;
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} // AddedComplexity
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} // Constraints = "$src1 = $dst"
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