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Fix machine operand traversal in ScheduleDAGInstrs::fixupKills

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@283315 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Krzysztof Parzyszek 2016-10-05 13:15:06 +00:00
parent 27025b7f3c
commit c29dc70bea
2 changed files with 44 additions and 2 deletions
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9
lib/CodeGen/ScheduleDAGInstrs.cpp
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@ -1309,7 +1309,13 @@ void ScheduleDAGInstrs::fixupKills(MachineBasicBlock *MBB) {
// register is used multiple times we only set the kill flag on
// the first use. Don't set kill flags on undef operands.
killedRegs.reset();
for (MachineOperand &MO : MI.operands()) {
// toggleKillFlag can append new operands (implicit defs), so using
// a range-based loop is not safe. The new operands will be appended
// at the end of the operand list and they don't need to be visited,
// so iterating until the currently last operand is ok.
for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI.getOperand(i);
if (!MO.isReg() || !MO.isUse() || MO.isUndef()) continue;
unsigned Reg = MO.getReg();
if ((Reg == 0) || MRI.isReserved(Reg)) continue;
@ -1333,7 +1339,6 @@ void ScheduleDAGInstrs::fixupKills(MachineBasicBlock *MBB) {
if (MO.isKill() != kill) {
DEBUG(dbgs() << "Fixing " << MO << " in ");
// Warning: toggleKillFlag may invalidate MO.
toggleKillFlag(&MI, MO);
DEBUG(MI.dump());
DEBUG({

37
test/CodeGen/Hexagon/post-ra-kill-update.mir Normal file
View File

@ -0,0 +1,37 @@
# RUN: llc -march=hexagon -mcpu=hexagonv60 -run-pass post-RA-sched -o - %s | FileCheck %s
# The post-RA scheduler reorders S2_lsr_r_p and S2_lsr_r_p_or. Both of them
# use r9, and the last of the two kills it. The kill flag fixup did not
# correctly update the flag, resulting in both instructions killing r9.
# CHECK-LABEL: name: foo
# Check for no-kill of r9 in the first instruction, after reordering:
# CHECK: %d7 = S2_lsr_r_p_or %d7, killed %d1, %r9
# CHECK: %d13 = S2_lsr_r_p killed %d0, killed %r9
--- |
define void @foo() {
ret void
}
...
---
name: foo
tracksRegLiveness: true
body: |
bb.0:
successors: %bb.1
liveins: %d0, %d1, %r9, %r13
%d7 = S2_asl_r_p %d0, %r13
%d5 = S2_asl_r_p %d1, killed %r13
%d6 = S2_lsr_r_p killed %d0, %r9
%d7 = S2_lsr_r_p_or killed %d7, killed %d1, killed %r9
%d1 = A2_combinew killed %r11, killed %r10
%d0 = A2_combinew killed %r15, killed %r14
J2_jump %bb.1, implicit-def %pc
bb.1:
A2_nop
...