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[InstCombine][AVX2] Add DemandedElts support for VPERMD/VPERMPS shuffles

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Simplify a vpermv shuffle mask based on the elements of the mask that are actually demanded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292371 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim 2017-01-18 14:47:49 +00:00
parent 1f4dfaa6a9
commit c2e261218f
2 changed files with 8 additions and 8 deletions
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5
lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
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@ -1482,7 +1482,10 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
case Intrinsic::x86_avx512_vpermilvar_ps_512:
case Intrinsic::x86_avx_vpermilvar_pd:
case Intrinsic::x86_avx_vpermilvar_pd_256:
case Intrinsic::x86_avx512_vpermilvar_pd_512: {
case Intrinsic::x86_avx512_vpermilvar_pd_512:
// PERMV
case Intrinsic::x86_avx2_permd:
case Intrinsic::x86_avx2_permps: {
Value *Op1 = II->getArgOperand(1);
TmpV = SimplifyDemandedVectorElts(Op1, DemandedElts, UndefElts,
Depth + 1);

11
test/Transforms/InstCombine/x86-avx2.ll
View File

@ -85,9 +85,7 @@ define <8 x float> @undef_test_vpermps(<8 x float> %a0) {
define <8 x i32> @elts_test_vpermd(<8 x i32> %a0, i32 %a1) {
; CHECK-LABEL: @elts_test_vpermd(
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> <i32 undef, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, i32 %a1, i32 0
; CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> [[TMP1]])
; CHECK-NEXT: ret <8 x i32> [[TMP2]]
; CHECK-NEXT: ret <8 x i32> %a0
;
%1 = insertelement <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, i32 %a1, i32 0
%2 = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> %1)
@ -97,10 +95,9 @@ define <8 x i32> @elts_test_vpermd(<8 x i32> %a0, i32 %a1) {
define <8 x float> @elts_test_vpermps(<8 x float> %a0, <8 x i32> %a1) {
; CHECK-LABEL: @elts_test_vpermps(
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> %a1, i32 0, i32 7
; CHECK-NEXT: [[TMP2:%.*]] = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> [[TMP1]])
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <8 x float> [[TMP2]], <8 x float> undef, <8 x i32> zeroinitializer
; CHECK-NEXT: ret <8 x float> [[TMP3]]
; CHECK-NEXT: [[TMP1:%.*]] = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> %a1)
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x float> [[TMP1]], <8 x float> undef, <8 x i32> zeroinitializer
; CHECK-NEXT: ret <8 x float> [[TMP2]]
;
%1 = insertelement <8 x i32> %a1, i32 0, i32 7
%2 = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> %1)