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[Hexagon] Do not check alignment for unsized types in isLegalAddressingMode

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When the same base address is used to load two different data types, LSR
would assume a memory type of "void". This type is not sized and has no
alignment information. Checking for it causes a crash.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277601 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Krzysztof Parzyszek 2016-08-03 15:06:18 +00:00
parent 1345035f71
commit c3332e48f0
2 changed files with 74 additions and 7 deletions
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23
lib/Target/Hexagon/HexagonISelLowering.cpp
View File

@ -3055,13 +3055,22 @@ bool HexagonTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
bool HexagonTargetLowering::isLegalAddressingMode(const DataLayout &DL,
const AddrMode &AM, Type *Ty,
unsigned AS) const {
unsigned A = DL.getABITypeAlignment(Ty);
// The base offset must be a multiple of the alignment.
if ((AM.BaseOffs % A) != 0)
return false;
// The shifted offset must fit in 11 bits.
if (!isInt<11>(AM.BaseOffs >> Log2_32(A)))
return false;
if (Ty->isSized()) {
// When LSR detects uses of the same base address to access different
// types (e.g. unions), it will assume a conservative type for these
// uses:
// LSR Use: Kind=Address of void in addrspace(4294967295), ...
// The type Ty passed here would then be "void". Skip the alignment
// checks, but do not return false right away, since that confuses
// LSR into crashing.
unsigned A = DL.getABITypeAlignment(Ty);
// The base offset must be a multiple of the alignment.
if ((AM.BaseOffs % A) != 0)
return false;
// The shifted offset must fit in 11 bits.
if (!isInt<11>(AM.BaseOffs >> Log2_32(A)))
return false;
}
// No global is ever allowed as a base.
if (AM.BaseGV)

58
test/CodeGen/Hexagon/is-legal-void.ll Normal file
View File

@ -0,0 +1,58 @@
; RUN: llc -march=hexagon < %s
; REQUIRES: asserts
; The two loads based on %struct.0, loading two different data types
; cause LSR to assume type "void" for the memory type. This would then
; cause an assert in isLegalAddressingMode. Make sure we no longer crash.
target triple = "hexagon"
%struct.0 = type { i8*, i8, %union.anon.0 }
%union.anon.0 = type { i8* }
define hidden fastcc void @fred() unnamed_addr #0 {
entry:
br i1 undef, label %while.end, label %while.body.lr.ph
while.body.lr.ph: ; preds = %entry
br label %while.body
while.body: ; preds = %exit.2, %while.body.lr.ph
%lsr.iv = phi %struct.0* [ %cgep22, %exit.2 ], [ undef, %while.body.lr.ph ]
switch i32 undef, label %exit [
i32 1, label %sw.bb.i
i32 2, label %sw.bb3.i
]
sw.bb.i: ; preds = %while.body
unreachable
sw.bb3.i: ; preds = %while.body
unreachable
exit: ; preds = %while.body
switch i32 undef, label %exit.2 [
i32 1, label %sw.bb.i17
i32 2, label %sw.bb3.i20
]
sw.bb.i17: ; preds = %.exit
%0 = bitcast %struct.0* %lsr.iv to i32*
%1 = load i32, i32* %0, align 4
unreachable
sw.bb3.i20: ; preds = %exit
%2 = bitcast %struct.0* %lsr.iv to i8**
%3 = load i8*, i8** %2, align 4
unreachable
exit.2: ; preds = %exit
%cgep22 = getelementptr %struct.0, %struct.0* %lsr.iv, i32 1
br label %while.body
while.end: ; preds = %entry
ret void
}
attributes #0 = { nounwind optsize "target-cpu"="hexagonv55" }