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Remove the cortex-a9-mp CPU.

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This CPU definition is redundant. The Cortex-A9 is defined as
supporting multiprocessing extensions. Remove its definition and
update appropriate tests.

LLVM defines both a cortex-a9 CPU and a cortex-a9-mp CPU. The only
difference between the two CPU definitions in ARM.td is that
cortex-a9-mp contains the feature FeatureMP for multiprocessing
extensions.

This is redundant since the Cortex-A9 is defined as having
multiprocessing extensions in the TRMs. armcc also defines the
Cortex-A9 as having multiprocessing extensions by default.

Change-Id: Ifcadaa6c322be0a33d9d2a39cfdd7da1d75981a7

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221166 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Charlie Turner 2014-11-03 17:38:00 +00:00
parent c34113433a
commit c3606b6b2e
6 changed files with 7 additions and 29 deletions
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6
lib/Target/ARM/ARM.td
View File

@ -356,12 +356,8 @@ def : ProcessorModel<"cortex-a8", CortexA8Model,
FeatureAClass]>;
def : ProcessorModel<"cortex-a9", CortexA9Model,
[ProcA9, HasV7Ops, FeatureNEON, FeatureDB,
FeatureDSPThumb2, FeatureHasRAS,
FeatureDSPThumb2, FeatureHasRAS, FeatureMP,
FeatureAClass]>;
def : ProcessorModel<"cortex-a9-mp", CortexA9Model,
[ProcA9, HasV7Ops, FeatureNEON, FeatureDB,
FeatureDSPThumb2, FeatureMP,
FeatureHasRAS, FeatureAClass]>;
// FIXME: A12 has currently the same Schedule model as A9
def : ProcessorModel<"cortex-a12", CortexA9Model,

22
test/CodeGen/ARM/build-attributes.ll
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@ -20,7 +20,6 @@
; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9-mp | FileCheck %s --check-prefix=CORTEX-A9-MP
; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
@ -301,7 +300,7 @@
; CORTEX-A9-SOFT-NOT: .eabi_attribute 27
; CORTEX-A9-SOFT-NOT: .eabi_attribute 28
; CORTEX-A9-SOFT: .eabi_attribute 36, 1
; CORTEX-A9-SOFT-NOT: .eabi_attribute 42
; CORTEX-A9-SOFT: .eabi_attribute 42, 1
; CORTEX-A9-SOFT: .eabi_attribute 68, 1
; CORTEX-A9-HARD: .cpu cortex-a9
@ -318,26 +317,9 @@
; CORTEX-A9-HARD-NOT: .eabi_attribute 27
; CORTEX-A9-HARD: .eabi_attribute 28, 1
; CORTEX-A9-HARD: .eabi_attribute 36, 1
; CORTEX-A9-HARD-NOT: .eabi_attribute 42
; CORTEX-A9-HARD: .eabi_attribute 42, 1
; CORTEX-A9-HARD: .eabi_attribute 68, 1
; CORTEX-A9-MP: .cpu cortex-a9-mp
; CORTEX-A9-MP: .eabi_attribute 6, 10
; CORTEX-A9-MP: .eabi_attribute 7, 65
; CORTEX-A9-MP: .eabi_attribute 8, 1
; CORTEX-A9-MP: .eabi_attribute 9, 2
; CORTEX-A9-MP: .fpu neon
; CORTEX-A9-MP: .eabi_attribute 20, 1
; CORTEX-A9-MP: .eabi_attribute 21, 1
; CORTEX-A9-MP: .eabi_attribute 23, 3
; CORTEX-A9-MP: .eabi_attribute 24, 1
; CORTEX-A9-MP: .eabi_attribute 25, 1
; CORTEX-A9-MP-NOT: .eabi_attribute 27
; CORTEX-A9-MP-NOT: .eabi_attribute 28
; CORTEX-A9-MP: .eabi_attribute 36, 1
; CORTEX-A9-MP: .eabi_attribute 42, 1
; CORTEX-A9-MP: .eabi_attribute 68, 1
; CORTEX-A12-DEFAULT: .cpu cortex-a12
; CORTEX-A12-DEFAULT: .eabi_attribute 6, 10
; CORTEX-A12-DEFAULT: .eabi_attribute 7, 65

2
test/CodeGen/ARM/prefetch.ll
View File

@ -1,7 +1,7 @@
; RUN: llc -mtriple=thumb-eabi -mattr=-thumb2 %s -o - | FileCheck %s -check-prefix CHECK-T1
; RUN: llc -mtriple=thumb-eabi -mattr=+v7 %s -o - | FileCheck %s -check-prefix=THUMB2
; RUN: llc -mtriple=arm-eabi -mattr=+v7 %s -o - | FileCheck %s -check-prefix=ARM
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9-mp %s -o - | FileCheck %s -check-prefix=ARM-MP
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 %s -o - | FileCheck %s -check-prefix=ARM-MP
; rdar://8601536
; CHECK-T1-NOT: pld

2
test/MC/ARM/arm_instructions.s
View File

@ -1,6 +1,6 @@
@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding %s \
@ RUN: | FileCheck %s -check-prefix=ALL
@ RUN: llvm-mc -mcpu=cortex-a9-mp -triple armv7-unknown-nacl -show-encoding %s \
@ RUN: llvm-mc -mcpu=cortex-a9 -triple armv7-unknown-nacl -show-encoding %s \
@ RUN: | FileCheck %s -check-prefix=NACL
@ RUN: llvm-mc -mcpu=cortex-a8 -mattr=+nacl-trap -triple armv7 -show-encoding %s \
@ RUN: | FileCheck %s -check-prefix=NACL

2
test/MC/Disassembler/ARM/arm-tests.txt
View File

@ -1,4 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=armv7-apple-darwin9 -mcpu=cortex-a9-mp | FileCheck %s
# RUN: llvm-mc --disassemble %s -triple=armv7-apple-darwin9 -mcpu=cortex-a9 | FileCheck %s
# CHECK: addpl r4, pc, #318767104
0x4c 0x45 0x8f 0x52

2
test/MC/Disassembler/ARM/thumb-tests.txt
View File

@ -1,4 +1,4 @@
# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 -mcpu=cortex-a9-mp | FileCheck %s
# RUN: llvm-mc --disassemble %s -triple=thumbv7-apple-darwin9 -mcpu=cortex-a9 | FileCheck %s
# CHECK: add r5, sp, #68
0x11 0xad