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Move MRI liveouts to X86 return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174402 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -738,6 +738,9 @@ bool X86FastISel::X86SelectRet(const Instruction *I) {
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if (F.isVarArg())
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return false;
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// Build a list of return value registers.
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SmallVector<unsigned, 4> RetRegs;
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if (Ret->getNumOperands() > 0) {
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SmallVector<ISD::OutputArg, 4> Outs;
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GetReturnInfo(F.getReturnType(), F.getAttributes(), Outs, TLI);
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@ -805,8 +808,8 @@ bool X86FastISel::X86SelectRet(const Instruction *I) {
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY),
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DstReg).addReg(SrcReg);
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// Mark the register as live out of the function.
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MRI.addLiveOut(VA.getLocReg());
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// Add register to return instruction.
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RetRegs.push_back(VA.getLocReg());
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}
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// The x86-64 ABI for returning structs by value requires that we copy
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@ -819,11 +822,14 @@ bool X86FastISel::X86SelectRet(const Instruction *I) {
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"SRetReturnReg should have been set in LowerFormalArguments()!");
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY),
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X86::RAX).addReg(Reg);
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MRI.addLiveOut(X86::RAX);
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RetRegs.push_back(X86::RAX);
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}
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// Now emit the RET.
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::RET));
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MachineInstrBuilder MIB =
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::RET));
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for (unsigned i = 0, e = RetRegs.size(); i != e; ++i)
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MIB.addReg(RetRegs[i], RegState::Implicit);
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return true;
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}
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@ -1590,14 +1590,7 @@ X86TargetLowering::LowerReturn(SDValue Chain,
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RVLocs, *DAG.getContext());
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CCInfo.AnalyzeReturn(Outs, RetCC_X86);
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// Add the regs to the liveout set for the function.
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MachineRegisterInfo &MRI = DAG.getMachineFunction().getRegInfo();
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for (unsigned i = 0; i != RVLocs.size(); ++i)
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if (RVLocs[i].isRegLoc() && !MRI.isLiveOut(RVLocs[i].getLocReg()))
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MRI.addLiveOut(RVLocs[i].getLocReg());
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SDValue Flag;
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SmallVector<SDValue, 6> RetOps;
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RetOps.push_back(Chain); // Operand #0 = Chain (updated below)
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// Operand #1 = Bytes To Pop
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@ -1666,6 +1659,7 @@ X86TargetLowering::LowerReturn(SDValue Chain,
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Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), ValToCopy, Flag);
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Flag = Chain.getValue(1);
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RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
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}
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// The x86-64 ABIs require that for returning structs by value we copy
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@ -1686,7 +1680,7 @@ X86TargetLowering::LowerReturn(SDValue Chain,
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Flag = Chain.getValue(1);
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// RAX/EAX now acts like a return value.
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MRI.addLiveOut(RetValReg);
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RetOps.push_back(DAG.getRegister(RetValReg, MVT::i64));
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}
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RetOps[0] = Chain; // Update chain.
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