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Update README entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125658 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1783,13 +1783,12 @@ entry:
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}
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Generated code:
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addq %rcx, %rdx
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movl $0, %eax
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adcq $0, %rax
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addq %r8, %rax
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movq %rax, (%rdi)
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movq %rdx, (%rsi)
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ret
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addq %rcx, %rdx
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sbbq %rax, %rax
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subq %rax, %r8
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movq %r8, (%rdi)
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movq %rdx, (%rsi)
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ret
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Expected code:
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addq %rcx, %rdx
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@ -1798,12 +1797,6 @@ Expected code:
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movq %rdx, (%rsi)
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ret
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The generated SelectionDAG has an ADD of an ADDE, where both operands of the
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ADDE are zero. Replacing one of the operands of the ADDE with the other operand
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of the ADD, and replacing the ADD with the ADDE, should give the desired result.
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(That said, we are doing a lot better than gcc on this testcase. :) )
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//===---------------------------------------------------------------------===//
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Switch lowering generates less than ideal code for the following switch:
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