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[Hexagon] Allow setting register in BitVal without storing into map

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In the bit tracker, references to other bit values in which the register
is 0 are prohibited. This means that generating self-referential register
cells like { w:32 [0-15]:s[0-15] [16-31]:s[15] } is impossible. In order
to get a self-referential cell, it had to be stored into a map and then
reloaded from it. To avoid this step, add a function that will set the
register to a given value without going through the map.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296025 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Krzysztof Parzyszek 2017-02-23 22:08:50 +00:00
parent 186113f5c1
commit c5dd216734
2 changed files with 13 additions and 6 deletions
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16
lib/Target/Hexagon/BitTracker.cpp
View File

@ -317,6 +317,15 @@ bool BT::RegisterCell::operator== (const RegisterCell &RC) const {
return true;
}
BT::RegisterCell &BT::RegisterCell::regify(unsigned R) {
for (unsigned i = 0, n = width(); i < n; ++i) {
const BitValue &V = Bits[i];
if (V.Type == BitValue::Ref && V.RefI.Reg == 0)
Bits[i].RefI = BitRef(R, i);
}
return *this;
}
uint16_t BT::MachineEvaluator::getRegBitWidth(const RegisterRef &RR) const {
// The general problem is with finding a register class that corresponds
// to a given reference reg:sub. There can be several such classes, and
@ -378,12 +387,7 @@ void BT::MachineEvaluator::putCell(const RegisterRef &RR, RegisterCell RC,
return;
assert(RR.Sub == 0 && "Unexpected sub-register in definition");
// Eliminate all ref-to-reg-0 bit values: replace them with "self".
for (unsigned i = 0, n = RC.width(); i < n; ++i) {
const BitValue &V = RC[i];
if (V.Type == BitValue::Ref && V.RefI.Reg == 0)
RC[i].RefI = BitRef(RR.Reg, i);
}
M[RR.Reg] = RC;
M[RR.Reg] = RC.regify(RR.Reg);
}
// Check if the cell represents a compile-time integer value.

3
lib/Target/Hexagon/BitTracker.h
View File

@ -283,6 +283,9 @@ struct BitTracker::RegisterCell {
return !operator==(RC);
}
// Replace the ref-to-reg-0 bit values with the given register.
RegisterCell &regify(unsigned R);
// Generate a "ref" cell for the corresponding register. In the resulting
// cell each bit will be described as being the same as the corresponding
// bit in register Reg (i.e. the cell is "defined" by register Reg).