Reg alloc doesn't really need LiveVariables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46420 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson 2008-01-27 22:00:00 +00:00
parent 24387df207
commit c66a4f912f

View File

@ -19,7 +19,6 @@
#include "llvm/CodeGen/MachineInstr.h" #include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/RegAllocRegistry.h" #include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetMachine.h"
@ -51,7 +50,6 @@ namespace {
MachineFunction *MF; MachineFunction *MF;
const MRegisterInfo *MRI; const MRegisterInfo *MRI;
const TargetInstrInfo *TII; const TargetInstrInfo *TII;
LiveVariables *LV;
// StackSlotForVirtReg - Maps virtual regs to the frame index where these // StackSlotForVirtReg - Maps virtual regs to the frame index where these
// values are spilled. // values are spilled.
@ -148,7 +146,6 @@ namespace {
} }
virtual void getAnalysisUsage(AnalysisUsage &AU) const { virtual void getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<LiveVariables>();
AU.addRequiredID(PHIEliminationID); AU.addRequiredID(PHIEliminationID);
AU.addRequiredID(TwoAddressInstructionPassID); AU.addRequiredID(TwoAddressInstructionPassID);
MachineFunctionPass::getAnalysisUsage(AU); MachineFunctionPass::getAnalysisUsage(AU);
@ -497,9 +494,8 @@ MachineInstr *RALocal::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
Ops.push_back(OpNum); Ops.push_back(OpNum);
if (MachineInstr* FMI = TII->foldMemoryOperand(MI, Ops, FrameIndex)) { if (MachineInstr* FMI = TII->foldMemoryOperand(MI, Ops, FrameIndex)) {
++NumFolded; ++NumFolded;
// Since we changed the address of MI, make sure to update live variables // Update kill/dead flags.
// to know that the new instruction has the properties of the old one. FMI->copyKillDeadInfo(MI);
LV->instructionChanged(MI, FMI);
return MBB.insert(MBB.erase(MI), FMI); return MBB.insert(MBB.erase(MI), FMI);
} }
@ -778,8 +774,6 @@ void RALocal::AllocateBasicBlock(MachineBasicBlock &MBB) {
// Finally, if this is a noop copy instruction, zap it. // Finally, if this is a noop copy instruction, zap it.
unsigned SrcReg, DstReg; unsigned SrcReg, DstReg;
if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg) { if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg) {
LV->removeVirtualRegistersKilled(MI);
LV->removeVirtualRegistersDead(MI);
MBB.erase(MI); MBB.erase(MI);
} }
} }
@ -821,7 +815,6 @@ bool RALocal::runOnMachineFunction(MachineFunction &Fn) {
TM = &Fn.getTarget(); TM = &Fn.getTarget();
MRI = TM->getRegisterInfo(); MRI = TM->getRegisterInfo();
TII = TM->getInstrInfo(); TII = TM->getInstrInfo();
LV = &getAnalysis<LiveVariables>();
PhysRegsUsed.assign(MRI->getNumRegs(), -1); PhysRegsUsed.assign(MRI->getNumRegs(), -1);