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fixed xsave, xsaveopt, xrstor mnemonics with intel syntax; added test cases

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179223 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Kay Tiong Khoo 2013-04-10 21:52:25 +00:00
parent c3b5997910
commit c92cc5d918
3 changed files with 21 additions and 3 deletions
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6
lib/Target/X86/X86InstrSystem.td
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@ -449,15 +449,15 @@ let Uses = [RDX, RAX] in {
def XSAVE : I<0xAE, MRM4m, (outs opaque512mem:$dst), (ins),
"xsave\t$dst", []>, TB;
def XSAVE64 : I<0xAE, MRM4m, (outs opaque512mem:$dst), (ins),
"xsaveq\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>;
"xsave{q|64}\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>;
def XRSTOR : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
"xrstor\t$dst", []>, TB;
def XRSTOR64 : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
"xrstorq\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>;
"xrstor{q|64}\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>;
def XSAVEOPT : I<0xAE, MRM6m, (outs opaque512mem:$dst), (ins),
"xsaveopt\t$dst", []>, TB;
def XSAVEOPT64 : I<0xAE, MRM6m, (outs opaque512mem:$dst), (ins),
"xsaveoptq\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>;
"xsaveopt{q|64}\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>;
}
} // SchedRW

9
test/MC/Disassembler/X86/intel-syntax.txt
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@ -110,3 +110,12 @@
# CHECK: vpgatherdd XMM10, DWORD PTR [R15 + 2*XMM9], XMM8
0xc4 0x02 0x39 0x90 0x14 0x4f
# CHECK: xsave64 OPAQUE PTR [RAX]
0x48 0x0f 0xae 0x20
# CHECK: xrstor64 OPAQUE PTR [RAX]
0x48 0x0f 0xae 0x28
# CHECK: xsaveopt64 OPAQUE PTR [RAX]
0x48 0x0f 0xae 0x30

9
test/MC/Disassembler/X86/x86-64.txt
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@ -112,3 +112,12 @@
# CHECK: xabort $13
0xc6 0xf8 0x0d
# CHECK: xsaveq (%rax)
0x48 0x0f 0xae 0x20
# CHECK: xrstorq (%rax)
0x48 0x0f 0xae 0x28
# CHECK: xsaveoptq (%rax)
0x48 0x0f 0xae 0x30