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[AMDGPU] Fix SIFoldOperands crash with clamp

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Fixes bug #33302. Pass did not account that Src1 of max instruction
can be an immediate.

Differential Revision: https://reviews.llvm.org/D33884

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304696 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Stanislav Mekhanoshin 2017-06-05 01:03:04 +00:00
parent 843f0af293
commit ca0adcb320
2 changed files with 22 additions and 1 deletions
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3
lib/Target/AMDGPU/SIFoldOperands.cpp
View File

@ -730,7 +730,8 @@ const MachineOperand *SIFoldOperands::isClamp(const MachineInstr &MI) const {
// Make sure sources are identical.
const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
if (!Src0->isReg() || Src0->getSubReg() != Src1->getSubReg() ||
if (!Src0->isReg() || !Src1->isReg() ||
Src0->getSubReg() != Src1->getSubReg() ||
Src0->getSubReg() != AMDGPU::NoSubRegister)
return nullptr;

20
test/CodeGen/AMDGPU/clamp-omod-special-case.mir
View File

@ -24,6 +24,10 @@
ret void
}
define amdgpu_ps void @v_max_reg_imm_f32() #0 {
ret void
}
attributes #0 = { nounwind "no-signed-zeros-fp-math"="false" }
...
@ -422,3 +426,19 @@ body: |
S_ENDPGM
...
---
# Pass used to crash with immediate second operand of max
name: v_max_reg_imm_f32
tracksRegLiveness: true
registers:
- { id: 0, class: vgpr_32 }
- { id: 1, class: vgpr_32 }
body: |
bb.0 (%ir-block.0):
liveins: %vgpr0
%0 = COPY %vgpr0
%1 = V_MAX_F32_e64 0, killed %0, 0, 1056964608, 1, 0, implicit %exec
...