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Changes recommended by Chris:

Browse Source 
InstSelectSimple.cpp:
  Change the checks for proper I/O port address size into an exit() instead
  of an assertion.  Assertions aren't used in Release builds, and handling
  this error should be graceful (not that this counts as graceful, but it's
  more graceful).

  Modified the generation of the IN/OUT instructions to have 0 arguments.
X86InstrInfo.td:
  Added the OpSize attribute to the 16 bit IN and OUT instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12786 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
John Criswell 2004-04-08 22:39:13 +00:00
parent f499eaca36
commit ca6ea0f137
3 changed files with 32 additions and 22 deletions
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25
lib/Target/X86/InstSelectSimple.cpp
View File

@ -1670,8 +1670,10 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
// First, determine that the size of the operand falls within the
// acceptable range for this architecture.
//
assert (((CI.getOperand(1)->getType()->getPrimitiveSize()) == 2) &&
"llvm.readport operand size is not a 16 bit value!");
if ((CI.getOperand(1)->getType()->getPrimitiveSize()) != 2) {
std::cerr << "llvm.readport: Address size is not 16 bits\n";
exit (1);
}
//
// Now, move the I/O port address into the DX register and use the IN
@ -1680,13 +1682,13 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
BuildMI(BB, X86::MOV16rr, 1, X86::DX).addReg(getReg(CI.getOperand(1)));
switch (CI.getCalledFunction()->getReturnType()->getPrimitiveSize()) {
case 1:
BuildMI(BB, X86::IN8, 1);
BuildMI(BB, X86::IN8, 0);
break;
case 2:
BuildMI(BB, X86::IN16, 1);
BuildMI(BB, X86::IN16, 0);
break;
case 4:
BuildMI(BB, X86::IN32, 1);
BuildMI(BB, X86::IN32, 0);
break;
default:
assert (0 && "Cannot do input on this data type");
@ -1698,8 +1700,11 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
// First, determine that the size of the operand falls within the
// acceptable range for this architecture.
//
assert (((CI.getOperand(1)->getType()->getPrimitiveSize()) == 2) &&
"llvm.readport operand size is not a 16 bit value!");
//
if ((CI.getOperand(1)->getType()->getPrimitiveSize()) != 2) {
std::cerr << "llvm.writeport: Address size is not 16 bits\n";
exit (1);
}
//
// Now, move the I/O port address into the DX register and the value to
@ -1709,15 +1714,15 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
switch (CI.getOperand(2)->getType()->getPrimitiveSize()) {
case 1:
BuildMI(BB, X86::MOV8rr, 1, X86::AL).addReg(getReg(CI.getOperand(2)));
BuildMI(BB, X86::OUT8, 1);
BuildMI(BB, X86::OUT8, 0);
break;
case 2:
BuildMI(BB, X86::MOV16rr, 1, X86::AX).addReg(getReg(CI.getOperand(2)));
BuildMI(BB, X86::OUT16, 1);
BuildMI(BB, X86::OUT16, 0);
break;
case 4:
BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(getReg(CI.getOperand(2)));
BuildMI(BB, X86::OUT32, 1);
BuildMI(BB, X86::OUT32, 0);
break;
default:
assert (0 && "Cannot do input on this data type");

25
lib/Target/X86/X86ISelSimple.cpp
View File

@ -1670,8 +1670,10 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
// First, determine that the size of the operand falls within the
// acceptable range for this architecture.
//
assert (((CI.getOperand(1)->getType()->getPrimitiveSize()) == 2) &&
"llvm.readport operand size is not a 16 bit value!");
if ((CI.getOperand(1)->getType()->getPrimitiveSize()) != 2) {
std::cerr << "llvm.readport: Address size is not 16 bits\n";
exit (1);
}
//
// Now, move the I/O port address into the DX register and use the IN
@ -1680,13 +1682,13 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
BuildMI(BB, X86::MOV16rr, 1, X86::DX).addReg(getReg(CI.getOperand(1)));
switch (CI.getCalledFunction()->getReturnType()->getPrimitiveSize()) {
case 1:
BuildMI(BB, X86::IN8, 1);
BuildMI(BB, X86::IN8, 0);
break;
case 2:
BuildMI(BB, X86::IN16, 1);
BuildMI(BB, X86::IN16, 0);
break;
case 4:
BuildMI(BB, X86::IN32, 1);
BuildMI(BB, X86::IN32, 0);
break;
default:
assert (0 && "Cannot do input on this data type");
@ -1698,8 +1700,11 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
// First, determine that the size of the operand falls within the
// acceptable range for this architecture.
//
assert (((CI.getOperand(1)->getType()->getPrimitiveSize()) == 2) &&
"llvm.readport operand size is not a 16 bit value!");
//
if ((CI.getOperand(1)->getType()->getPrimitiveSize()) != 2) {
std::cerr << "llvm.writeport: Address size is not 16 bits\n";
exit (1);
}
//
// Now, move the I/O port address into the DX register and the value to
@ -1709,15 +1714,15 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
switch (CI.getOperand(2)->getType()->getPrimitiveSize()) {
case 1:
BuildMI(BB, X86::MOV8rr, 1, X86::AL).addReg(getReg(CI.getOperand(2)));
BuildMI(BB, X86::OUT8, 1);
BuildMI(BB, X86::OUT8, 0);
break;
case 2:
BuildMI(BB, X86::MOV16rr, 1, X86::AX).addReg(getReg(CI.getOperand(2)));
BuildMI(BB, X86::OUT16, 1);
BuildMI(BB, X86::OUT16, 0);
break;
case 4:
BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(getReg(CI.getOperand(2)));
BuildMI(BB, X86::OUT32, 1);
BuildMI(BB, X86::OUT32, 0);
break;
default:
assert (0 && "Cannot do input on this data type");

4
lib/Target/X86/X86InstrInfo.td
View File

@ -249,11 +249,11 @@ def REP_STOSD : I<"rep stosd", 0xAB, RawFrm>, REP,
// Input/Output Instructions...
//
def IN8 : I<"in", 0xEC, RawFrm>, Imp<[DX],[AL]>, PrintImpUsesAfter, PrintImpDefsAfter; // in AL = I/O address DX
def IN16 : I<"in", 0xED, RawFrm>, Imp<[DX],[AX]>, PrintImpUsesAfter, PrintImpDefsAfter; // in AX = I/O address DX
def IN16 : I<"in", 0xED, RawFrm>, Imp<[DX],[AX]>, OpSize, PrintImpUsesAfter, PrintImpDefsAfter; // in AX = I/O address DX
def IN32 : I<"in", 0xED, RawFrm>, Imp<[DX],[EAX]>, PrintImpUsesAfter, PrintImpDefsAfter; // in EAX = I/O address DX
def OUT8 : I<"out", 0xEE, RawFrm>, Imp<[DX, AL], []>, PrintImpUsesAfter;
def OUT16 : I<"out", 0xEF, RawFrm>, Imp<[DX, AX], []>, PrintImpUsesAfter;
def OUT16 : I<"out", 0xEF, RawFrm>, Imp<[DX, AX], []>, OpSize, PrintImpUsesAfter;
def OUT32 : I<"out", 0xEF, RawFrm>, Imp<[DX, EAX], []>, PrintImpUsesAfter;
//===----------------------------------------------------------------------===//