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For ISD::RET, if # of operands >= 2, try selection the real data dep. operand
first before the chain. e.g. int X; int foo(int x) { x += X + 37; return x; } If chain operand is selected first, we would generate: movl X, %eax movl 4(%esp), %ecx leal 37(%ecx,%eax), %eax rather than movl $37, %eax addl 4(%esp), %eax addl X, %eax which does not require %ecx. (Due to ADD32rm not matching.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24673 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -356,15 +356,22 @@ SDOperand X86DAGToDAGISel::Select(SDOperand Op) {
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break;
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break;
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case ISD::RET: {
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case ISD::RET: {
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SDOperand Chain = Select(N->getOperand(0)); // Token chain.
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SDOperand Chain = N->getOperand(0); // Token chain.
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switch (N->getNumOperands()) {
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unsigned NumOps = N->getNumOperands();
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// Note: A bit of a hack / optimization... Try to delay chain selection
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// as much as possible. So it's more likely it has already been selected
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// for a real use.
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switch (NumOps) {
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default:
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default:
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assert(0 && "Unknown return instruction!");
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assert(0 && "Unknown return instruction!");
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case 3:
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case 3:
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Chain = Select(Chain);
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assert(0 && "Not yet handled return instruction!");
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assert(0 && "Not yet handled return instruction!");
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break;
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break;
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case 2: {
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case 2: {
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SDOperand Val = Select(N->getOperand(1));
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SDOperand Val = Select(N->getOperand(1));
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Chain = Select(Chain);
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switch (N->getOperand(1).getValueType()) {
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switch (N->getOperand(1).getValueType()) {
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default:
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default:
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assert(0 && "All other types should have been promoted!!");
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assert(0 && "All other types should have been promoted!!");
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@ -378,6 +385,7 @@ SDOperand X86DAGToDAGISel::Select(SDOperand Op) {
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}
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}
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}
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}
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case 1:
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case 1:
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Chain = Select(Chain);
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break;
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break;
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}
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}
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if (X86Lowering.getBytesToPopOnReturn() == 0)
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if (X86Lowering.getBytesToPopOnReturn() == 0)
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