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Revert r42653 and forward-port the code that lets INC64_32r be

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converted to LEA64_32r in x86's convertToThreeAddress. This
replaces code like this:
   movl  %esi, %edi
   inc   %edi
with this:
   lea   1(%rsi), %edi
which appears to be beneficial.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61830 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2009-01-06 23:34:46 +00:00
parent 21213e75b5
commit cca2983291
2 changed files with 25 additions and 2 deletions
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6
lib/Target/X86/X86InstrInfo.cpp
View File

@ -1108,7 +1108,8 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
switch (MIOpc) {
default: return 0;
case X86::INC64r:
case X86::INC32r: {
case X86::INC32r:
case X86::INC64_32r: {
assert(MI->getNumOperands() >= 2 && "Unknown inc instruction!");
unsigned Opc = MIOpc == X86::INC64r ? X86::LEA64r
: (is64Bit ? X86::LEA64_32r : X86::LEA32r);
@ -1126,7 +1127,8 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
Src, isKill, 1);
break;
case X86::DEC64r:
case X86::DEC32r: {
case X86::DEC32r:
case X86::DEC64_32r: {
assert(MI->getNumOperands() >= 2 && "Unknown dec instruction!");
unsigned Opc = MIOpc == X86::DEC64r ? X86::LEA64r
: (is64Bit ? X86::LEA64_32r : X86::LEA32r);

21
test/CodeGen/X86/2to3-inc64.ll Normal file
View File

@ -0,0 +1,21 @@
; RUN: llvm-as < %s | llc -march=x86-64 -o %t -f -stats -info-output-file - | \
; RUN: grep {asm-printer} | grep {Number of machine instrs printed} | grep 5
; RUN: grep {leal 1(\%rsi),} %t
define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2) nounwind {
entry:
%0 = add i32 %i2, 1 ; <i32> [#uses=1]
%1 = sext i32 %0 to i64 ; <i64> [#uses=1]
%2 = getelementptr i8* null, i64 %1 ; <i8*> [#uses=1]
%3 = load i8* %2, align 1 ; <i8> [#uses=1]
%4 = icmp eq i8 0, %3 ; <i1> [#uses=1]
br i1 %4, label %bb3, label %bb34
bb3: ; preds = %entry
%5 = add i32 %i2, 4 ; <i32> [#uses=0]
ret i8 0
bb34: ; preds = %entry
ret i8 0
}