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ARM: fix folding stack adjustment (again again again...)
This time, the issue is that we weren't accounting for the possibility that aligned DPRs could have been stored after the final "push" in a prologue. When that happened we effectively moved a "sub sp, #N" from below the aligned stores to above them, and everything went to pot. To make it worse, I'd actually committed something testing that we produced wrong code, so the test update is tiny. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248437 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -488,7 +488,8 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
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if (NumBytes) {
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// Adjust SP after all the callee-save spills.
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if (tryFoldSPUpdateIntoPushPop(STI, MF, LastPush, NumBytes))
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if (AFI->getNumAlignedDPRCS2Regs() == 0 &&
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tryFoldSPUpdateIntoPushPop(STI, MF, LastPush, NumBytes))
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DefCFAOffsetCandidates.addExtraBytes(LastPush, NumBytes);
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else {
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emitSPUpdate(isARM, MBB, MBBI, dl, TII, -NumBytes,
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@ -67,11 +67,12 @@ define void @check_vfp_fold() minsize {
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; iOS uses aligned NEON stores here, which is convenient since we
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; want to make sure that works too.
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; CHECK-IOS-LABEL: check_vfp_fold:
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; CHECK-IOS: push {r0, r1, r2, r3, r4, r7, lr}
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; CHECK-IOS: push {r4, r7, lr}
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; CHECK-IOS: sub.w r4, sp, #16
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; CHECK-IOS: bfc r4, #0, #4
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; CHECK-IOS: mov sp, r4
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; CHECK-IOS: vst1.64 {d8, d9}, [r4:128]
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; CHECK-IOS: sub sp, #16
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; ...
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; CHECK-IOS: add r4, sp, #16
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; CHECK-IOS: vld1.64 {d8, d9}, [r4:128]
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