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bah, must generate all results

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24574 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-12-02 06:08:08 +00:00
parent 49c709f891
commit cde0f5cfe7
1 changed files with 8 additions and 2 deletions
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10
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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@ -1191,8 +1191,14 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
break;
case ISD::READCYCLECOUNTER:
Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain
if (Tmp1 != Node->getOperand(0))
Result = DAG.getNode(ISD::READCYCLECOUNTER, MVT::i64, Tmp1);
if (Tmp1 != Node->getOperand(0)) {
std::vector<MVT::ValueType> rtypes;
std::vector<SDOperand> rvals;
rtypes.push_back(MVT::i64);
rtypes.push_back(MVT::Other);
rvals.push_back(Tmp1);
Result = DAG.getNode(ISD::READCYCLECOUNTER, rtypes, rvals);
}
// Since rdcc produce two values, make sure to remember that we legalized
// both of them.