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in the case where an instruction only has one implementation
of a mneumonic, report operand errors with better location info. For example, we now report: t.s:6:14: error: invalid operand for instruction cwtl $1 ^ but we fail for common cases like: t.s:11:4: error: invalid operand for instruction addl $1, $1 ^ because we don't know if this is supposed to be the reg/imm or imm/reg form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113178 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -83,7 +83,8 @@ private:
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bool MatchInstruction(SMLoc IDLoc,
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bool MatchInstruction(SMLoc IDLoc,
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const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
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const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
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MCInst &Inst) {
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MCInst &Inst) {
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if (MatchInstructionImpl(Operands, Inst) == Match_Success)
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unsigned ErrorInfo;
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if (MatchInstructionImpl(Operands, Inst, ErrorInfo) == Match_Success)
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return false;
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return false;
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// FIXME: We should give nicer diagnostics about the exact failure.
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// FIXME: We should give nicer diagnostics about the exact failure.
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@ -863,9 +863,10 @@ X86ATTAsmParser::MatchInstruction(SMLoc IDLoc,
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assert(!Operands.empty() && "Unexpect empty operand list!");
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assert(!Operands.empty() && "Unexpect empty operand list!");
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bool WasOriginallyInvalidOperand = false;
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bool WasOriginallyInvalidOperand = false;
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unsigned OrigErrorInfo;
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// First, try a direct match.
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// First, try a direct match.
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switch (MatchInstructionImpl(Operands, Inst)) {
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switch (MatchInstructionImpl(Operands, Inst, OrigErrorInfo)) {
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case Match_Success:
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case Match_Success:
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return false;
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return false;
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case Match_MissingFeature:
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case Match_MissingFeature:
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@ -895,13 +896,14 @@ X86ATTAsmParser::MatchInstruction(SMLoc IDLoc,
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// Check for the various suffix matches.
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// Check for the various suffix matches.
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Tmp[Base.size()] = 'b';
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Tmp[Base.size()] = 'b';
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MatchResultTy MatchB = MatchInstructionImpl(Operands, Inst);
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unsigned BErrorInfo, WErrorInfo, LErrorInfo, QErrorInfo;
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MatchResultTy MatchB = MatchInstructionImpl(Operands, Inst, BErrorInfo);
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Tmp[Base.size()] = 'w';
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Tmp[Base.size()] = 'w';
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MatchResultTy MatchW = MatchInstructionImpl(Operands, Inst);
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MatchResultTy MatchW = MatchInstructionImpl(Operands, Inst, WErrorInfo);
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Tmp[Base.size()] = 'l';
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Tmp[Base.size()] = 'l';
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MatchResultTy MatchL = MatchInstructionImpl(Operands, Inst);
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MatchResultTy MatchL = MatchInstructionImpl(Operands, Inst, LErrorInfo);
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Tmp[Base.size()] = 'q';
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Tmp[Base.size()] = 'q';
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MatchResultTy MatchQ = MatchInstructionImpl(Operands, Inst);
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MatchResultTy MatchQ = MatchInstructionImpl(Operands, Inst, QErrorInfo);
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// Restore the old token.
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// Restore the old token.
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Op->setTokenValue(Base);
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Op->setTokenValue(Base);
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@ -952,10 +954,19 @@ X86ATTAsmParser::MatchInstruction(SMLoc IDLoc,
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// mnemonic was invalid.
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// mnemonic was invalid.
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if ((MatchB == Match_MnemonicFail) && (MatchW == Match_MnemonicFail) &&
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if ((MatchB == Match_MnemonicFail) && (MatchW == Match_MnemonicFail) &&
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(MatchL == Match_MnemonicFail) && (MatchQ == Match_MnemonicFail)) {
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(MatchL == Match_MnemonicFail) && (MatchQ == Match_MnemonicFail)) {
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if (WasOriginallyInvalidOperand)
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if (!WasOriginallyInvalidOperand) {
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Error(IDLoc, "invalid operand for instruction");
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else
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Error(IDLoc, "invalid instruction mnemonic '" + Base + "'");
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Error(IDLoc, "invalid instruction mnemonic '" + Base + "'");
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return true;
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}
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// Recover location info for the operand if we know which was the problem.
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SMLoc ErrorLoc = IDLoc;
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if (OrigErrorInfo != ~0U) {
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ErrorLoc = ((X86Operand*)Operands[OrigErrorInfo])->getStartLoc();
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if (ErrorLoc == SMLoc()) ErrorLoc = IDLoc;
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}
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Error(ErrorLoc, "invalid operand for instruction");
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return true;
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return true;
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}
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}
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@ -1563,7 +1563,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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OS << " Match_MissingFeature\n";
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OS << " Match_MissingFeature\n";
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OS << " };\n";
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OS << " };\n";
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OS << " MatchResultTy MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>"
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OS << " MatchResultTy MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>"
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<< " &Operands, MCInst &Inst);\n\n";
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<< " &Operands, MCInst &Inst, unsigned &ErrorInfo);\n\n";
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OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n";
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OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n";
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@ -1679,16 +1679,19 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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<< Target.getName() << ClassName << "::\n"
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<< Target.getName() << ClassName << "::\n"
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<< "MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>"
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<< "MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>"
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<< " &Operands,\n";
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<< " &Operands,\n";
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OS << " MCInst &Inst) {\n";
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OS << " MCInst &Inst, unsigned &ErrorInfo) {\n";
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// Emit code to get the available features.
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// Emit code to get the available features.
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OS << " // Get the current feature set.\n";
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OS << " // Get the current feature set.\n";
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OS << " unsigned AvailableFeatures = getAvailableFeatures();\n\n";
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OS << " unsigned AvailableFeatures = getAvailableFeatures();\n\n";
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OS << " ErrorInfo = 0;\n";
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// Emit code to compute the class list for this operand vector.
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// Emit code to compute the class list for this operand vector.
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OS << " // Eliminate obvious mismatches.\n";
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OS << " // Eliminate obvious mismatches.\n";
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OS << " if (Operands.size() > " << MaxNumOperands << "+1)\n";
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OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n";
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OS << " return Match_InvalidOperand;\n\n";
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OS << " ErrorInfo = " << (MaxNumOperands+1) << ";\n";
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OS << " return Match_InvalidOperand;\n";
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OS << " }\n\n";
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OS << " // Compute the class list for this operand vector.\n";
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OS << " // Compute the class list for this operand vector.\n";
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OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n";
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OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n";
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@ -1696,8 +1699,10 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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OS << " Classes[i-1] = ClassifyOperand(Operands[i]);\n\n";
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OS << " Classes[i-1] = ClassifyOperand(Operands[i]);\n\n";
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OS << " // Check for invalid operands before matching.\n";
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OS << " // Check for invalid operands before matching.\n";
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OS << " if (Classes[i-1] == InvalidMatchClass)\n";
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OS << " if (Classes[i-1] == InvalidMatchClass) {\n";
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OS << " ErrorInfo = i;\n";
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OS << " return Match_InvalidOperand;\n";
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OS << " return Match_InvalidOperand;\n";
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OS << " }\n";
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OS << " }\n\n";
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OS << " }\n\n";
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OS << " // Mark unused classes.\n";
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OS << " // Mark unused classes.\n";
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@ -1729,11 +1734,22 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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OS << " assert(Mnemonic == it->Mnemonic);\n";
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OS << " assert(Mnemonic == it->Mnemonic);\n";
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// Emit check that the subclasses match.
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// Emit check that the subclasses match.
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for (unsigned i = 0; i != MaxNumOperands; ++i) {
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OS << " bool OperandsValid = true;\n";
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OS << " if (!IsSubclass(Classes["
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OS << " for (unsigned i = 0; i != " << MaxNumOperands << "; ++i) {\n";
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<< i << "], it->Classes[" << i << "]))\n";
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OS << " if (IsSubclass(Classes[i], it->Classes[i]))\n";
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OS << " continue;\n";
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OS << " continue;\n";
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}
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OS << " // If there is only one instruction with this opcode, report\n";
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OS << " // this as an operand error with location info.\n";
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OS << " if (MnemonicRange.first+1 == ie) {\n";
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OS << " ErrorInfo = i+1;\n";
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OS << " return Match_InvalidOperand;\n";
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OS << " }\n";
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OS << " // Otherwise, just reject this instance of the mnemonic.\n";
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OS << " OperandsValid = false;\n";
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OS << " break;\n";
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OS << " }\n\n";
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OS << " if (!OperandsValid) continue;\n";
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// Emit check that the required features are available.
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// Emit check that the required features are available.
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OS << " if ((AvailableFeatures & it->RequiredFeatures) "
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OS << " if ((AvailableFeatures & it->RequiredFeatures) "
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@ -1756,6 +1772,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
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OS << " // Okay, we had no match. Try to return a useful error code.\n";
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OS << " // Okay, we had no match. Try to return a useful error code.\n";
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OS << " if (HadMatchOtherThanFeatures) return Match_MissingFeature;\n";
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OS << " if (HadMatchOtherThanFeatures) return Match_MissingFeature;\n";
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OS << " ErrorInfo = ~0U;\n";
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OS << " return Match_InvalidOperand;\n";
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OS << " return Match_InvalidOperand;\n";
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OS << "}\n\n";
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OS << "}\n\n";
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