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[X86][AVX512] Updated shuffle comments instruction macros to split writemask instructions. NFC
This will make it easier to support the different writemask cases in shuffle comments git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269174 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -21,61 +21,67 @@
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using namespace llvm;
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#define CASE_MASK_INS_COMMON(Inst, Suffix, src) \
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case X86::V##Inst##Suffix##src: \
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case X86::V##Inst##Suffix##src##k: \
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case X86::V##Inst##Suffix##src##kz:
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#define CASE_SSE_INS_COMMON(Inst, src) \
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#define CASE_SSE_INS_COMMON(Inst, src) \
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case X86::Inst##src:
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#define CASE_AVX_INS_COMMON(Inst, Suffix, src) \
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#define CASE_AVX_INS_COMMON(Inst, Suffix, src) \
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case X86::V##Inst##Suffix##src:
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#define CASE_MOVDUP(Inst, src) \
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CASE_MASK_INS_COMMON(Inst, Z, r##src) \
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CASE_MASK_INS_COMMON(Inst, Z256, r##src) \
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CASE_MASK_INS_COMMON(Inst, Z128, r##src) \
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CASE_AVX_INS_COMMON(Inst, , r##src) \
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CASE_AVX_INS_COMMON(Inst, Y, r##src) \
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#define CASE_MASK_INS_COMMON(Inst, Suffix, src) \
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case X86::V##Inst##Suffix##src##k:
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#define CASE_MASKZ_INS_COMMON(Inst, Suffix, src) \
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case X86::V##Inst##Suffix##src##kz:
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#define CASE_AVX512_INS_COMMON(Inst, Suffix, src) \
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CASE_AVX_INS_COMMON(Inst, Suffix, src) \
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CASE_MASK_INS_COMMON(Inst, Suffix, src) \
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CASE_MASKZ_INS_COMMON(Inst, Suffix, src)
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#define CASE_MOVDUP(Inst, src) \
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CASE_AVX512_INS_COMMON(Inst, Z, r##src) \
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CASE_AVX512_INS_COMMON(Inst, Z256, r##src) \
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CASE_AVX512_INS_COMMON(Inst, Z128, r##src) \
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CASE_AVX_INS_COMMON(Inst, , r##src) \
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CASE_AVX_INS_COMMON(Inst, Y, r##src) \
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CASE_SSE_INS_COMMON(Inst, r##src)
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#define CASE_PMOVZX(Inst, src) \
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CASE_MASK_INS_COMMON(Inst, Z, r##src) \
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CASE_MASK_INS_COMMON(Inst, Z256, r##src) \
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CASE_MASK_INS_COMMON(Inst, Z128, r##src) \
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CASE_AVX_INS_COMMON(Inst, , r##src) \
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CASE_AVX_INS_COMMON(Inst, Y, r##src) \
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#define CASE_PMOVZX(Inst, src) \
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CASE_AVX512_INS_COMMON(Inst, Z, r##src) \
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CASE_AVX512_INS_COMMON(Inst, Z256, r##src) \
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CASE_AVX512_INS_COMMON(Inst, Z128, r##src) \
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CASE_AVX_INS_COMMON(Inst, , r##src) \
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CASE_AVX_INS_COMMON(Inst, Y, r##src) \
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CASE_SSE_INS_COMMON(Inst, r##src)
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#define CASE_UNPCK(Inst, src) \
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CASE_MASK_INS_COMMON(Inst, Z, r##src) \
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CASE_MASK_INS_COMMON(Inst, Z256, r##src) \
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CASE_MASK_INS_COMMON(Inst, Z128, r##src) \
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CASE_AVX_INS_COMMON(Inst, , r##src) \
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CASE_AVX_INS_COMMON(Inst, Y, r##src) \
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#define CASE_UNPCK(Inst, src) \
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CASE_AVX512_INS_COMMON(Inst, Z, r##src) \
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CASE_AVX512_INS_COMMON(Inst, Z256, r##src) \
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CASE_AVX512_INS_COMMON(Inst, Z128, r##src) \
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CASE_AVX_INS_COMMON(Inst, , r##src) \
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CASE_AVX_INS_COMMON(Inst, Y, r##src) \
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CASE_SSE_INS_COMMON(Inst, r##src)
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#define CASE_SHUF(Inst, src) \
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CASE_MASK_INS_COMMON(Inst, Z, r##src##i) \
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CASE_MASK_INS_COMMON(Inst, Z256, r##src##i) \
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CASE_MASK_INS_COMMON(Inst, Z128, r##src##i) \
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CASE_AVX_INS_COMMON(Inst, , r##src##i) \
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CASE_AVX_INS_COMMON(Inst, Y, r##src##i) \
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#define CASE_SHUF(Inst, src) \
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CASE_AVX512_INS_COMMON(Inst, Z, r##src##i) \
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CASE_AVX512_INS_COMMON(Inst, Z256, r##src##i) \
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CASE_AVX512_INS_COMMON(Inst, Z128, r##src##i) \
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CASE_AVX_INS_COMMON(Inst, , r##src##i) \
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CASE_AVX_INS_COMMON(Inst, Y, r##src##i) \
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CASE_SSE_INS_COMMON(Inst, r##src##i)
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#define CASE_VPERM(Inst, src) \
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CASE_MASK_INS_COMMON(Inst, Z, src##i) \
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CASE_MASK_INS_COMMON(Inst, Z256, src##i) \
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CASE_MASK_INS_COMMON(Inst, Z128, src##i) \
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CASE_AVX_INS_COMMON(Inst, , src##i) \
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#define CASE_VPERM(Inst, src) \
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CASE_AVX512_INS_COMMON(Inst, Z, src##i) \
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CASE_AVX512_INS_COMMON(Inst, Z256, src##i) \
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CASE_AVX512_INS_COMMON(Inst, Z128, src##i) \
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CASE_AVX_INS_COMMON(Inst, , src##i) \
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CASE_AVX_INS_COMMON(Inst, Y, src##i)
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#define CASE_VSHUF(Inst, src) \
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CASE_MASK_INS_COMMON(SHUFF##Inst, Z, r##src##i) \
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CASE_MASK_INS_COMMON(SHUFI##Inst, Z, r##src##i) \
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CASE_MASK_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \
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CASE_MASK_INS_COMMON(SHUFI##Inst, Z256, r##src##i)
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CASE_AVX512_INS_COMMON(SHUFF##Inst, Z, r##src##i) \
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CASE_AVX512_INS_COMMON(SHUFI##Inst, Z, r##src##i) \
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CASE_AVX512_INS_COMMON(SHUFF##Inst, Z256, r##src##i) \
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CASE_AVX512_INS_COMMON(SHUFI##Inst, Z256, r##src##i)
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static unsigned getVectorRegSize(unsigned RegNo) {
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if (X86::ZMM0 <= RegNo && RegNo <= X86::ZMM31)
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