mirror of
https://github.com/RPCSX/llvm.git
synced 2024-11-28 22:20:37 +00:00
Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48447 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
755ebab37d
commit
d183307639
@ -95,6 +95,7 @@ void AlphaCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
|
||||
case Alpha::ALTENT:
|
||||
case Alpha::PCLABEL:
|
||||
case Alpha::MEMLABEL:
|
||||
case TargetInstrInfo::IMPLICIT_DEF:
|
||||
break; //skip these
|
||||
}
|
||||
}
|
||||
|
@ -112,6 +112,8 @@ void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
|
||||
case TargetInstrInfo::LABEL:
|
||||
MCE.emitLabel(MI.getOperand(0).getImm());
|
||||
break;
|
||||
case TargetInstrInfo::IMPLICIT_DEF:
|
||||
break; // pseudo opcode, no side effects
|
||||
case PPC::MovePCtoLR:
|
||||
case PPC::MovePCtoLR8:
|
||||
assert(TM.getRelocationModel() == Reloc::PIC_);
|
||||
|
@ -621,6 +621,7 @@ void Emitter::emitInstruction(const MachineInstr &MI,
|
||||
case TargetInstrInfo::LABEL:
|
||||
MCE.emitLabel(MI.getOperand(0).getImm());
|
||||
break;
|
||||
case TargetInstrInfo::IMPLICIT_DEF:
|
||||
case TargetInstrInfo::DECLARE:
|
||||
case X86::DWARF_LOC:
|
||||
case X86::FP_REG_KILL:
|
||||
|
Loading…
Reference in New Issue
Block a user