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AMDGPU/R600: Fix GlobalValue regressions.

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Don't cast GV expression to MCSymbolRefExpr. r272705 changed GV to binary
expressions by including offset even if the offset it 0
(we haven't hit this sooner since tested workloads don't include static offsets)
We don't really care about the type of expression, so set it directly.
Fixes: r272705

Consider section relative relocations. Since all const as data is in one boffer section relative is equivalent to abs32.
Fixes: r273166

Differential Revision: http://reviews.llvm.org/D21633

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273785 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jan Vesely 2016-06-25 18:24:16 +00:00
parent 5f5bb0365d
commit d207fc4c12
3 changed files with 13 additions and 7 deletions
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2
lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
View File

@ -56,6 +56,8 @@ unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
default: break;
case FK_PCRel_4:
return ELF::R_AMDGPU_REL32;
case FK_SecRel_4:
return ELF::R_AMDGPU_ABS32;
}
llvm_unreachable("unhandled relocation type");

3
lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
View File

@ -163,7 +163,6 @@ uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI,
}
if (MO.isExpr()) {
const MCSymbolRefExpr *Expr = cast<MCSymbolRefExpr>(MO.getExpr());
// We put rodata at the end of code section, then map the entire
// code secetion as vtx buf. Thus the section relative address is the
// correct one.
@ -171,7 +170,7 @@ uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI,
// We can't easily get the order of the current one, so compare against
// the first one and adjust offset.
const unsigned offset = (&MO == &MI.getOperand(0)) ? 0 : 4;
Fixups.push_back(MCFixup::create(offset, Expr, FK_SecRel_4, MI.getLoc()));
Fixups.push_back(MCFixup::create(offset, MO.getExpr(), FK_SecRel_4, MI.getLoc()));
return 0;
}

15
test/CodeGen/AMDGPU/no-initializer-constant-addrspace.ll
View File

@ -1,19 +1,24 @@
; RUN: llc -march=amdgcn -mcpu=SI -o /dev/null %s
; RUN: llc -march=amdgcn -mcpu=tonga -o /dev/null %s
; RUN: llc -march=r600 -mcpu=cypress -o /dev/null %s
; RUN: llc -march=amdgcn -mcpu=SI -filetype=obj < %s | llvm-readobj -relocations -symbols | FileCheck %s -check-prefix=GCN
; RUN: llc -march=amdgcn -mcpu=tonga -filetype=obj < %s | llvm-readobj -relocations -symbols | FileCheck %s -check-prefix=GCN
; RUN: llc -march=r600 -mcpu=cypress -filetype=obj < %s | llvm-readobj -relocations -symbols | FileCheck %s -check-prefix=EG
; GCN: R_AMDGPU_REL32 extern_const_addrspace
; EG: R_AMDGPU_ABS32 extern_const_addrspace
; CHECK-DAG: Name: extern_const_addrspace
@extern_const_addrspace = external unnamed_addr addrspace(2) constant [5 x i32], align 4
; FUNC-LABEL: {{^}}load_extern_const_init:
; CHECK-DAG: Name: load_extern_const_init
define void @load_extern_const_init(i32 addrspace(1)* %out) nounwind {
%val = load i32, i32 addrspace(2)* getelementptr ([5 x i32], [5 x i32] addrspace(2)* @extern_const_addrspace, i64 0, i64 3), align 4
store i32 %val, i32 addrspace(1)* %out, align 4
ret void
}
; CHECK-DAG: Name: undef_const_addrspace
@undef_const_addrspace = unnamed_addr addrspace(2) constant [5 x i32] undef, align 4
; FUNC-LABEL: {{^}}load_undef_const_init:
; CHECK-DAG: Name: undef_const_addrspace
define void @load_undef_const_init(i32 addrspace(1)* %out) nounwind {
%val = load i32, i32 addrspace(2)* getelementptr ([5 x i32], [5 x i32] addrspace(2)* @undef_const_addrspace, i64 0, i64 3), align 4
store i32 %val, i32 addrspace(1)* %out, align 4