RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2024-12-14 23:48:49 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

AArch64: rename compact unwind forms back to UNWIND_ARM64_*. NFC.

Browse Source 
Looks like the global rename last year was a bit over-zealous. These things
really are referred to with ARM64 elsewhere (ld64, libunwind, ...).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261698 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2016-02-23 21:49:05 +00:00
parent 64f8810499
commit d2665d52bf
1 changed files with 30 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

60
lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
View File

@ -323,14 +323,14 @@ namespace CU {
enum CompactUnwindEncodings {
/// \brief A "frameless" leaf function, where no non-volatile registers are
/// saved. The return remains in LR throughout the function.
UNWIND_AArch64_MODE_FRAMELESS = 0x02000000,
UNWIND_ARM64_MODE_FRAMELESS = 0x02000000,
/// \brief No compact unwind encoding available. Instead the low 23-bits of
/// the compact unwind encoding is the offset of the DWARF FDE in the
/// __eh_frame section. This mode is never used in object files. It is only
/// generated by the linker in final linked images, which have only DWARF info
/// for a function.
UNWIND_AArch64_MODE_DWARF = 0x03000000,
UNWIND_ARM64_MODE_DWARF = 0x03000000,
/// \brief This is a standard arm64 prologue where FP/LR are immediately
/// pushed on the stack, then SP is copied to FP. If there are any
@ -338,18 +338,18 @@ enum CompactUnwindEncodings {
/// in a contiguous ranger right below the saved FP/LR pair. Any subset of the
/// five X pairs and four D pairs can be saved, but the memory layout must be
/// in register number order.
UNWIND_AArch64_MODE_FRAME = 0x04000000,
UNWIND_ARM64_MODE_FRAME = 0x04000000,
/// \brief Frame register pair encodings.
UNWIND_AArch64_FRAME_X19_X20_PAIR = 0x00000001,
UNWIND_AArch64_FRAME_X21_X22_PAIR = 0x00000002,
UNWIND_AArch64_FRAME_X23_X24_PAIR = 0x00000004,
UNWIND_AArch64_FRAME_X25_X26_PAIR = 0x00000008,
UNWIND_AArch64_FRAME_X27_X28_PAIR = 0x00000010,
UNWIND_AArch64_FRAME_D8_D9_PAIR = 0x00000100,
UNWIND_AArch64_FRAME_D10_D11_PAIR = 0x00000200,
UNWIND_AArch64_FRAME_D12_D13_PAIR = 0x00000400,
UNWIND_AArch64_FRAME_D14_D15_PAIR = 0x00000800
UNWIND_ARM64_FRAME_X19_X20_PAIR = 0x00000001,
UNWIND_ARM64_FRAME_X21_X22_PAIR = 0x00000002,
UNWIND_ARM64_FRAME_X23_X24_PAIR = 0x00000004,
UNWIND_ARM64_FRAME_X25_X26_PAIR = 0x00000008,
UNWIND_ARM64_FRAME_X27_X28_PAIR = 0x00000010,
UNWIND_ARM64_FRAME_D8_D9_PAIR = 0x00000100,
UNWIND_ARM64_FRAME_D10_D11_PAIR = 0x00000200,
UNWIND_ARM64_FRAME_D12_D13_PAIR = 0x00000400,
UNWIND_ARM64_FRAME_D14_D15_PAIR = 0x00000800
};
} // end CU namespace
@ -359,7 +359,7 @@ class DarwinAArch64AsmBackend : public AArch64AsmBackend {
const MCRegisterInfo &MRI;
/// \brief Encode compact unwind stack adjustment for frameless functions.
/// See UNWIND_AArch64_FRAMELESS_STACK_SIZE_MASK in compact_unwind_encoding.h.
/// See UNWIND_ARM64_FRAMELESS_STACK_SIZE_MASK in compact_unwind_encoding.h.
/// The stack size always needs to be 16 byte aligned.
uint32_t encodeStackAdjustment(uint32_t StackSize) const {
return (StackSize / 16) << 12;
@ -378,7 +378,7 @@ public:
uint32_t generateCompactUnwindEncoding(
ArrayRef<MCCFIInstruction> Instrs) const override {
if (Instrs.empty())
return CU::UNWIND_AArch64_MODE_FRAMELESS;
return CU::UNWIND_ARM64_MODE_FRAMELESS;
bool HasFP = false;
unsigned StackSize = 0;
@ -390,7 +390,7 @@ public:
switch (Inst.getOperation()) {
default:
// Cannot handle this directive: bail out.
return CU::UNWIND_AArch64_MODE_DWARF;
return CU::UNWIND_ARM64_MODE_DWARF;
case MCCFIInstruction::OpDefCfa: {
// Defines a frame pointer.
assert(getXRegFromWReg(MRI.getLLVMRegNum(Inst.getRegister(), true)) ==
@ -415,7 +415,7 @@ public:
"Pushing invalid registers for frame!");
// Indicate that the function has a frame.
CompactUnwindEncoding |= CU::UNWIND_AArch64_MODE_FRAME;
CompactUnwindEncoding |= CU::UNWIND_ARM64_MODE_FRAME;
HasFP = true;
break;
}
@ -429,11 +429,11 @@ public:
// `.cfi_offset' instructions with the appropriate registers specified.
unsigned Reg1 = MRI.getLLVMRegNum(Inst.getRegister(), true);
if (i + 1 == e)
return CU::UNWIND_AArch64_MODE_DWARF;
return CU::UNWIND_ARM64_MODE_DWARF;
const MCCFIInstruction &Inst2 = Instrs[++i];
if (Inst2.getOperation() != MCCFIInstruction::OpOffset)
return CU::UNWIND_AArch64_MODE_DWARF;
return CU::UNWIND_ARM64_MODE_DWARF;
unsigned Reg2 = MRI.getLLVMRegNum(Inst2.getRegister(), true);
// N.B. The encodings must be in register number order, and the X
@ -449,19 +449,19 @@ public:
if (Reg1 == AArch64::X19 && Reg2 == AArch64::X20 &&
(CompactUnwindEncoding & 0xF1E) == 0)
CompactUnwindEncoding |= CU::UNWIND_AArch64_FRAME_X19_X20_PAIR;
CompactUnwindEncoding |= CU::UNWIND_ARM64_FRAME_X19_X20_PAIR;
else if (Reg1 == AArch64::X21 && Reg2 == AArch64::X22 &&
(CompactUnwindEncoding & 0xF1C) == 0)
CompactUnwindEncoding |= CU::UNWIND_AArch64_FRAME_X21_X22_PAIR;
CompactUnwindEncoding |= CU::UNWIND_ARM64_FRAME_X21_X22_PAIR;
else if (Reg1 == AArch64::X23 && Reg2 == AArch64::X24 &&
(CompactUnwindEncoding & 0xF18) == 0)
CompactUnwindEncoding |= CU::UNWIND_AArch64_FRAME_X23_X24_PAIR;
CompactUnwindEncoding |= CU::UNWIND_ARM64_FRAME_X23_X24_PAIR;
else if (Reg1 == AArch64::X25 && Reg2 == AArch64::X26 &&
(CompactUnwindEncoding & 0xF10) == 0)
CompactUnwindEncoding |= CU::UNWIND_AArch64_FRAME_X25_X26_PAIR;
CompactUnwindEncoding |= CU::UNWIND_ARM64_FRAME_X25_X26_PAIR;
else if (Reg1 == AArch64::X27 && Reg2 == AArch64::X28 &&
(CompactUnwindEncoding & 0xF00) == 0)
CompactUnwindEncoding |= CU::UNWIND_AArch64_FRAME_X27_X28_PAIR;
CompactUnwindEncoding |= CU::UNWIND_ARM64_FRAME_X27_X28_PAIR;
else {
Reg1 = getDRegFromBReg(Reg1);
Reg2 = getDRegFromBReg(Reg2);
@ -472,18 +472,18 @@ public:
// D14/D15 pair = 0x00000800
if (Reg1 == AArch64::D8 && Reg2 == AArch64::D9 &&
(CompactUnwindEncoding & 0xE00) == 0)
CompactUnwindEncoding |= CU::UNWIND_AArch64_FRAME_D8_D9_PAIR;
CompactUnwindEncoding |= CU::UNWIND_ARM64_FRAME_D8_D9_PAIR;
else if (Reg1 == AArch64::D10 && Reg2 == AArch64::D11 &&
(CompactUnwindEncoding & 0xC00) == 0)
CompactUnwindEncoding |= CU::UNWIND_AArch64_FRAME_D10_D11_PAIR;
CompactUnwindEncoding |= CU::UNWIND_ARM64_FRAME_D10_D11_PAIR;
else if (Reg1 == AArch64::D12 && Reg2 == AArch64::D13 &&
(CompactUnwindEncoding & 0x800) == 0)
CompactUnwindEncoding |= CU::UNWIND_AArch64_FRAME_D12_D13_PAIR;
CompactUnwindEncoding |= CU::UNWIND_ARM64_FRAME_D12_D13_PAIR;
else if (Reg1 == AArch64::D14 && Reg2 == AArch64::D15)
CompactUnwindEncoding |= CU::UNWIND_AArch64_FRAME_D14_D15_PAIR;
CompactUnwindEncoding |= CU::UNWIND_ARM64_FRAME_D14_D15_PAIR;
else
// A pair was pushed which we cannot handle.
return CU::UNWIND_AArch64_MODE_DWARF;
return CU::UNWIND_ARM64_MODE_DWARF;
}
break;
@ -495,9 +495,9 @@ public:
// With compact unwind info we can only represent stack adjustments of up
// to 65520 bytes.
if (StackSize > 65520)
return CU::UNWIND_AArch64_MODE_DWARF;
return CU::UNWIND_ARM64_MODE_DWARF;
CompactUnwindEncoding |= CU::UNWIND_AArch64_MODE_FRAMELESS;
CompactUnwindEncoding |= CU::UNWIND_ARM64_MODE_FRAMELESS;
CompactUnwindEncoding |= encodeStackAdjustment(StackSize);
}