RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2025-01-01 09:18:45 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[AVX512] adding AVXVBMI feature flag

Browse Source 
The feature flag is for VPERMB,VPERMI2B,VPERMT2B and VPMULTISHIFTQB instructions. 
More about the instruction can be found in:
hattps://software.intel.com/sites/default/files/managed/07/b7/319433-023.pdf

Differential Revision: http://reviews.llvm.org/D16190


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258012 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Michael Zuckerman 2016-01-17 13:42:12 +00:00
parent 177a5cb01e
commit d26cdd00ea
5 changed files with 12 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
lib/Support/Host.cpp
View File

@ -823,6 +823,7 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
Features["avx512cd"] = HasLeaf7 && ((EBX >> 28) & 1) && HasAVX512Save;
Features["avx512bw"] = HasLeaf7 && ((EBX >> 30) & 1) && HasAVX512Save;
Features["avx512vl"] = HasLeaf7 && ((EBX >> 31) & 1) && HasAVX512Save;
Features["avx515vbmi"] = HasLeaf7 && ((ECX >> 1) & 1) && HasAVX512Save;
bool HasLeafD = MaxLevel >= 0xd &&
!GetX86CpuIDAndInfoEx(0xd, 0x1, &EAX, &EBX, &ECX, &EDX);

4
lib/Target/X86/X86.td
View File

@ -134,6 +134,9 @@ def FeatureBWI : SubtargetFeature<"avx512bw", "HasBWI", "true",
def FeatureVLX : SubtargetFeature<"avx512vl", "HasVLX", "true",
"Enable AVX-512 Vector Length eXtensions",
[FeatureAVX512]>;
def FeatureVBMI : SubtargetFeature<"avx512vbmi", "HasVBMI", "true",
"Enable AVX-512 Vector Bit Manipulation Instructions",
[FeatureAVX512]>;
def FeaturePKU : SubtargetFeature<"pku", "HasPKU", "true",
"Enable protection keys">;
def FeaturePCLMUL : SubtargetFeature<"pclmul", "HasPCLMUL", "true",
@ -508,6 +511,7 @@ class SkylakeProc<string Name> : ProcessorModel<Name, HaswellModel, [
FeatureLZCNT,
FeatureBMI,
FeatureBMI2,
FeatureVBMI,
FeatureFMA,
FeatureRTM,
FeatureHLE,

3
lib/Target/X86/X86InstrInfo.td
View File

@ -773,7 +773,7 @@ def HasVLX : Predicate<"Subtarget->hasVLX()">,
def NoVLX : Predicate<"!Subtarget->hasVLX()">;
def NoVLX_Or_NoBWI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasBWI()">;
def NoVLX_Or_NoDQI : Predicate<"!Subtarget->hasVLX() || !Subtarget->hasDQI()">;
def PKU : Predicate<"!Subtarget->hasPKU()">;
def PKU : Predicate<"Subtarget->hasPKU()">;
def HasPOPCNT : Predicate<"Subtarget->hasPOPCNT()">;
def HasAES : Predicate<"Subtarget->hasAES()">;
@ -795,6 +795,7 @@ def HasFSGSBase : Predicate<"Subtarget->hasFSGSBase()">;
def HasLZCNT : Predicate<"Subtarget->hasLZCNT()">;
def HasBMI : Predicate<"Subtarget->hasBMI()">;
def HasBMI2 : Predicate<"Subtarget->hasBMI2()">;
def HasVBMI : Predicate<"Subtarget->hasVBMI()">;
def HasRTM : Predicate<"Subtarget->hasRTM()">;
def HasHLE : Predicate<"Subtarget->hasHLE()">;
def HasTSX : Predicate<"Subtarget->hasRTM() || Subtarget->hasHLE()">;

1
lib/Target/X86/X86Subtarget.cpp
View File

@ -261,6 +261,7 @@ void X86Subtarget::initializeEnvironment() {
HasLZCNT = false;
HasBMI = false;
HasBMI2 = false;
HasVBMI = false;
HasRTM = false;
HasHLE = false;
HasERI = false;

4
lib/Target/X86/X86Subtarget.h
View File

@ -134,6 +134,9 @@ protected:
/// Processor has BMI2 instructions.
bool HasBMI2;
/// Processor has VBMI instructions.
bool HasVBMI;
/// Processor has RTM instructions.
bool HasRTM;
@ -374,6 +377,7 @@ public:
bool hasLZCNT() const { return HasLZCNT; }
bool hasBMI() const { return HasBMI; }
bool hasBMI2() const { return HasBMI2; }
bool hasVBMI() const { return HasVBMI; }
bool hasRTM() const { return HasRTM; }
bool hasHLE() const { return HasHLE; }
bool hasADX() const { return HasADX; }