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[X86] Add knownbits vector SUB test

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286508 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim 2016-11-10 21:50:23 +00:00
parent 2821987cf3
commit d2d5b99bae
1 changed files with 23 additions and 0 deletions
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test/CodeGen/X86/known-bits-vector.ll
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@ -203,3 +203,26 @@ define <4 x i32> @knownbits_mask_trunc_shuffle_shl(<4 x i64> %a0) nounwind {
%4 = shl <4 x i32> %3, <i32 22, i32 22, i32 22, i32 22> %4 = shl <4 x i32> %3, <i32 22, i32 22, i32 22, i32 22>
ret <4 x i32> %4 ret <4 x i32> %4
} }
define <4 x i32> @knownbits_sub_lshr(<4 x i32> %a0) nounwind {
; X32-LABEL: knownbits_sub_lshr:
; X32: # BB#0:
; X32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0
; X32-NEXT: vmovdqa {{.*#+}} xmm1 = [255,255,255,255]
; X32-NEXT: vpsubd %xmm0, %xmm1, %xmm0
; X32-NEXT: vpsrld $22, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: knownbits_sub_lshr:
; X64: # BB#0:
; X64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
; X64-NEXT: vmovdqa {{.*#+}} xmm1 = [255,255,255,255]
; X64-NEXT: vpsubd %xmm0, %xmm1, %xmm0
; X64-NEXT: vpsrld $22, %xmm0, %xmm0
; X64-NEXT: retq
%1 = and <4 x i32> %a0, <i32 15, i32 15, i32 15, i32 15>
%2 = sub <4 x i32> <i32 255, i32 255, i32 255, i32 255>, %1
%3 = lshr <4 x i32> %2, <i32 22, i32 22, i32 22, i32 22>
ret <4 x i32> %3
}