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Preserve the original ordering when a CSR has multiple aliases.

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Previously, these aliases would be ordered alphabetically. (BH, BL)

Print out the computed allocation orders.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132580 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2011-06-03 20:34:50 +00:00
parent 965fefa1ad
commit d365fa9415
1 changed files with 14 additions and 2 deletions
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16
lib/CodeGen/RegisterClassInfo.cpp
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@ -14,10 +14,14 @@
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "regalloc"
#include "RegisterClassInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
RegisterClassInfo::RegisterClassInfo() : Tag(0), MF(0), TRI(0), CalleeSaved(0)
@ -86,8 +90,9 @@ void RegisterClassInfo::compute(const TargetRegisterClass *RC) const {
if (Reserved.test(PhysReg))
continue;
if (unsigned CSR = CSRNum[PhysReg])
// PhysReg aliases a CSR, save it for later.
CSRAlias.push_back(std::make_pair(CSR, PhysReg));
// PhysReg aliases a CSR, save it for later. Provide a (CSR, N) sort key
// to preserve the original ordering of multiple aliases of the same CSR.
CSRAlias.push_back(std::make_pair((CSR << 16) + (I - AOB), PhysReg));
else
RCI.Order[N++] = PhysReg;
}
@ -101,6 +106,13 @@ void RegisterClassInfo::compute(const TargetRegisterClass *RC) const {
for (unsigned i = 0, e = CSRAlias.size(); i != e; ++i)
RCI.Order[N++] = CSRAlias[i].second;
DEBUG({
dbgs() << "AllocationOrder(" << RC->getName() << ") = [";
for (unsigned I = 0; I != N; ++I)
dbgs() << ' ' << PrintReg(RCI.Order[I], TRI);
dbgs() << " ]\n";
});
// RCI is now up-to-date.
RCI.Tag = Tag;
}