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Account for scalarization costs in BasicTTI::getMemoryOpCost for extending vector loads
When a vector type legalizes to a larger vector type, and the target does not support the associated extending load (or truncating store), then legalization will scalarize the load (or store) resulting in an associated scalarization cost. BasicTTI::getMemoryOpCost needs to account for this. Between this, and r205487, PowerPC on the P7 with VSX enabled shows: MultiSource/Benchmarks/PAQ8p/paq8p: 43% speedup SingleSource/Benchmarks/BenchmarkGame/puzzle: 51% speedup SingleSource/UnitTests/Vectorizer/gcc-loops 28% speedup (some of these are new; some of these, such as PAQ8p, just reverse regressions that VSX support would trigger) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205495 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -416,8 +416,30 @@ unsigned BasicTTI::getMemoryOpCost(unsigned Opcode, Type *Src,
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assert(!Src->isVoidTy() && "Invalid type");
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std::pair<unsigned, MVT> LT = getTLI()->getTypeLegalizationCost(Src);
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// Assume that all loads of legal types cost 1.
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return LT.first;
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// Assuming that all loads of legal types cost 1.
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unsigned Cost = LT.first;
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if (Src->isVectorTy() &&
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Src->getPrimitiveSizeInBits() < LT.second.getSizeInBits()) {
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// This is a vector load that legalizes to a larger type than the vector
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// itself. Unless the corresponding extending load or truncating store is
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// legal, then this will scalarize.
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TargetLowering::LegalizeAction LA;
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MVT MemVT = getTLI()->getSimpleValueType(Src, true);
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if (Opcode == Instruction::Store)
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LA = getTLI()->getTruncStoreAction(LT.second, MemVT);
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else
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LA = getTLI()->getLoadExtAction(ISD::EXTLOAD, MemVT);
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if (LA != TargetLowering::Legal && LA != TargetLowering::Custom) {
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// This is a vector load/store for some illegal type that is scalarized.
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// We must account for the cost of building or decomposing the vector.
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Cost += getScalarizationOverhead(Src, Opcode != Instruction::Store,
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Opcode == Instruction::Store);
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}
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}
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return Cost;
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}
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unsigned BasicTTI::getIntrinsicInstrCost(Intrinsic::ID IID, Type *RetTy,
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@ -29,6 +29,11 @@ define i32 @loads(i32 %arg) {
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; CHECK: cost of 4 {{.*}} load
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load i128* undef, align 4
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; FIXME: There actually are sub-vector Altivec loads, and so we could handle
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; this with a small expense, but we don't currently.
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; CHECK: cost of 60 {{.*}} load
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load <4 x i16>* undef, align 2
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ret i32 undef
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}
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