Fix a bug in the 3-address conversion of LEA when one of the operands is an

undef virtual register. The problem is that ProcessImplicitDefs removes the
definition of the register and marks all uses as undef. If we lose the undef
marker then we get a register which has no def, is not marked as undef. The
live interval analysis does not collect information for these virtual
registers and we crash in later passes.

Together with Michael Kuperstein <michael.m.kuperstein@intel.com>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160260 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Nadav Rotem 2012-07-16 10:52:25 +00:00
parent 349f14c72c
commit d93ea88cde
2 changed files with 23 additions and 0 deletions

View File

@ -2016,6 +2016,13 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
.addReg(Dest, RegState::Define |
getDeadRegState(isDead)),
Src, isKill, Src2, isKill2);
// Preserve undefness of the operands.
bool isUndef = MI->getOperand(1).isUndef();
bool isUndef2 = MI->getOperand(2).isUndef();
NewMI->getOperand(1).setIsUndef(isUndef);
NewMI->getOperand(3).setIsUndef(isUndef2);
if (LV && isKill2)
LV->replaceKillInstruction(Src2, MI, NewMI);
break;

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@ -0,0 +1,16 @@
; RUN: llc < %s -march=x86-64 -mcpu=corei7
define void @autogen_SD2543() {
A:
%E83 = add i32 0, 1
%E820 = add i32 0, undef
br label %C
C:
%B908 = add i32 %E83, %E820
store i32 %B908, i32* undef
%Sl2391 = select i1 undef, i32 undef, i32 %E83
%Cmp3114 = icmp ne i32 %Sl2391, undef
br i1 %Cmp3114, label %C, label %G
G:
ret void
}