From d96428597b9a4bcf3c0702bbb497796b922c2e91 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Sat, 8 Dec 2007 07:04:58 +0000
Subject: [PATCH] Fix a significant code quality regression I introduced on
 PPC64 quite a while ago.  We now produce:

_foo:
	mflr r0
	std r0, 16(r1)
	ld r2, 16(r1)
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr

instead of:

_foo:
	mflr r0
	std r0, 16(r1)
	lis r0, 0
	ori r0, r0, 16
	ldx r2, r1, r0
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr

for:

void foo(void **X) {
  *X = __builtin_return_address(0);
}

on ppc64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44701 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/PowerPC/PPCRegisterInfo.cpp | 2 +-
 test/CodeGen/PowerPC/retaddr.ll        | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp
index c574f7004aa..150bda7e242 100644
--- a/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -817,7 +817,7 @@ void PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
   // clear can be encoded.  This is extremely uncommon, because normally you
   // only "std" to a stack slot that is at least 4-byte aligned, but it can
   // happen in invalid code.
-  if (isInt16(Offset) && (!isIXAddr || (isIXAddr & 3) == 0)) {
+  if (isInt16(Offset) && (!isIXAddr || (Offset & 3) == 0)) {
     if (isIXAddr)
       Offset >>= 2;    // The actual encoded value has the low two bits zero.
     MI.getOperand(OffsetOperandNo).ChangeToImmediate(Offset);
diff --git a/test/CodeGen/PowerPC/retaddr.ll b/test/CodeGen/PowerPC/retaddr.ll
index 6b9a5e3f068..f4cad34adda 100644
--- a/test/CodeGen/PowerPC/retaddr.ll
+++ b/test/CodeGen/PowerPC/retaddr.ll
@@ -1,5 +1,6 @@
 ; RUN: llvm-as < %s | llc -march=ppc32 | grep mflr
 ; RUN: llvm-as < %s | llc -march=ppc32 | grep lwz
+; RUN: llvm-as < %s | llc -march=ppc64 | grep {ld r., 16(r1)}
 
 target triple = "powerpc-apple-darwin8"