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AArch64Subtarget: Use default member initializers

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271057 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matthias Braun 2016-05-27 22:14:09 +00:00
parent b2f9f8e5dd
commit da265fc2fa
2 changed files with 15 additions and 19 deletions
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8
lib/Target/AArch64/AArch64Subtarget.cpp
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@ -50,12 +50,8 @@ AArch64Subtarget::initializeSubtargetDependencies(StringRef FS) {
AArch64Subtarget::AArch64Subtarget(const Triple &TT, const std::string &CPU,
const std::string &FS,
const TargetMachine &TM, bool LittleEndian)
: AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
HasV8_1aOps(false), HasV8_2aOps(false), HasFPARMv8(false), HasNEON(false),
HasCrypto(false), HasCRC(false), HasPerfMon(false), HasFullFP16(false),
HasZeroCycleRegMove(false), HasZeroCycleZeroing(false),
StrictAlign(false), ReserveX18(TT.isOSDarwin()), IsLittle(LittleEndian),
CPUString(CPU), TargetTriple(TT), FrameLowering(),
: AArch64GenSubtargetInfo(TT, CPU, FS), ReserveX18(TT.isOSDarwin()),
IsLittle(LittleEndian), CPUString(CPU), TargetTriple(TT), FrameLowering(),
InstrInfo(initializeSubtargetDependencies(FS)), TSInfo(),
TLInfo(TM, *this), GISel() {}

26
lib/Target/AArch64/AArch64Subtarget.h
View File

@ -45,27 +45,27 @@ protected:
};
/// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
ARMProcFamilyEnum ARMProcFamily;
ARMProcFamilyEnum ARMProcFamily = Others;
bool HasV8_1aOps;
bool HasV8_2aOps;
bool HasV8_1aOps = false;
bool HasV8_2aOps = false;
bool HasFPARMv8;
bool HasNEON;
bool HasCrypto;
bool HasCRC;
bool HasPerfMon;
bool HasFullFP16;
bool HasSPE;
bool HasFPARMv8 = false;
bool HasNEON = false;
bool HasCrypto = false;
bool HasCRC = false;
bool HasPerfMon = false;
bool HasFullFP16 = false;
bool HasSPE = false;
// HasZeroCycleRegMove - Has zero-cycle register mov instructions.
bool HasZeroCycleRegMove;
bool HasZeroCycleRegMove = false;
// HasZeroCycleZeroing - Has zero-cycle zeroing instructions.
bool HasZeroCycleZeroing;
bool HasZeroCycleZeroing = false;
// StrictAlign - Disallow unaligned memory accesses.
bool StrictAlign;
bool StrictAlign = false;
// ReserveX18 - X18 is not available as a general purpose register.
bool ReserveX18;