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Fix type-checking for load transformation which is not legal on floating-point types. PR11674.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147323 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eli Friedman 2011-12-28 21:24:44 +00:00
parent eaf0608891
commit da813f4209
2 changed files with 16 additions and 1 deletions
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3
lib/Target/X86/X86ISelLowering.cpp
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@ -13924,7 +13924,8 @@ static SDValue PerformLOADCombine(SDNode *N, SelectionDAG &DAG,
// shuffle. We need SSE4 for the shuffles.
// TODO: It is possible to support ZExt by zeroing the undef values
// during the shuffle phase or after the shuffle.
if (RegVT.isVector() && Ext == ISD::EXTLOAD && Subtarget->hasSSE41()) {
if (RegVT.isVector() && RegVT.isInteger() &&
Ext == ISD::EXTLOAD && Subtarget->hasSSE41()) {
assert(MemVT != RegVT && "Cannot extend to the same type");
assert(MemVT.isVector() && "Must load a vector from memory");

14
test/CodeGen/X86/vec_fpext.ll Normal file
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@ -0,0 +1,14 @@
; RUN: llc < %s -march=x86 -mattr=+sse41,-avx | FileCheck %s
; PR11674
define void @fpext_frommem(<2 x float>* %in, <2 x double>* %out) {
entry:
; TODO: We should be able to generate cvtps2pd for the load.
; For now, just check that we generate something sane.
; CHECK: cvtss2sd
; CHECK: cvtss2sd
%0 = load <2 x float>* %in, align 8
%1 = fpext <2 x float> %0 to <2 x double>
store <2 x double> %1, <2 x double>* %out, align 1
ret void
}