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[X86] Add test cases showing missed opportunities to use rotate right by 1 instructions when operation reads/writes memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295625 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -541,3 +541,86 @@ define i8 @rotr1_8(i8 %A) nounwind {
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%D = or i8 %B, %C
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ret i8 %D
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}
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define void @rotr1_64_mem(i64* %Aptr) nounwind {
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; 32-LABEL: rotr1_64_mem:
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; 32: # BB#0:
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; 32-NEXT: pushl %esi
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; 32-NEXT: movl 8(%esp), %eax
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; 32-NEXT: movl (%eax), %ecx
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; 32-NEXT: movl 4(%eax), %edx
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; 32-NEXT: movl %edx, %esi
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; 32-NEXT: shldl $31, %ecx, %esi
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; 32-NEXT: shldl $31, %edx, %ecx
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; 32-NEXT: movl %ecx, 4(%eax)
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; 32-NEXT: movl %esi, (%eax)
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; 32-NEXT: popl %esi
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; 64-LABEL: rotr1_64_mem:
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; 64: # BB#0:
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; 64-NEXT: rolq $63, (%rdi)
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; 64-NEXT: retq
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%A = load i64, i64 *%Aptr
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%B = shl i64 %A, 63
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%C = lshr i64 %A, 1
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%D = or i64 %B, %C
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store i64 %D, i64* %Aptr
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ret void
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}
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define void @rotr1_32_mem(i32* %Aptr) nounwind {
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; 32-LABEL: rotr1_32_mem:
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; 32: # BB#0:
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; 32-NEXT: movl 4(%esp), %eax
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; 32-NEXT: roll $31, (%eax)
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; 32-NEXT: retl
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;
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; 64-LABEL: rotr1_32_mem:
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; 64: # BB#0:
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; 64-NEXT: roll $31, (%rdi)
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; 64-NEXT: retq
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%A = load i32, i32 *%Aptr
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%B = shl i32 %A, 31
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%C = lshr i32 %A, 1
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%D = or i32 %B, %C
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store i32 %D, i32* %Aptr
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ret void
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}
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define void @rotr1_16_mem(i16* %Aptr) nounwind {
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; 32-LABEL: rotr1_16_mem:
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; 32: # BB#0:
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; 32-NEXT: movl 4(%esp), %eax
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; 32-NEXT: rolw $15, (%eax)
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; 32-NEXT: retl
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;
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; 64-LABEL: rotr1_16_mem:
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; 64: # BB#0:
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; 64-NEXT: rolw $15, (%rdi)
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; 64-NEXT: retq
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%A = load i16, i16 *%Aptr
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%B = shl i16 %A, 15
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%C = lshr i16 %A, 1
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%D = or i16 %B, %C
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store i16 %D, i16* %Aptr
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ret void
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}
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define void @rotr1_8_mem(i8* %Aptr) nounwind {
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; 32-LABEL: rotr1_8_mem:
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; 32: # BB#0:
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; 32-NEXT: movl 4(%esp), %eax
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; 32-NEXT: rolb $7, (%eax)
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; 32-NEXT: retl
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;
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; 64-LABEL: rotr1_8_mem:
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; 64: # BB#0:
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; 64-NEXT: rolb $7, (%rdi)
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; 64-NEXT: retq
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%A = load i8, i8 *%Aptr
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%B = shl i8 %A, 7
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%C = lshr i8 %A, 1
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%D = or i8 %B, %C
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store i8 %D, i8* %Aptr
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ret void
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}
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