RPCSX/llvm
1
0
Fork 0
mirror of https://github.com/RPCSX/llvm.git synced 2025-02-24 15:12:36 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

[RegisterBankInfo] Avoid code duplication in OperandsMapper for the computation of the end of range.

Browse Source 
Refactor the code so that we do not compute in two different places the
end iterator for the range of new virtual registers for a given operand.
Although this refactoring was intended as NFC, this is not the case
because it actually fixes a bug where we were returning a range off by 1
(too long). Right now, this could not result in an actual bug because we
were accessing this range via the BreakDown size of the related operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@272208 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Quentin Colombet 2016-06-08 21:55:26 +00:00
parent d36db423b8
commit dd694f3ed6
2 changed files with 25 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h
View File

@ -216,6 +216,14 @@ public:
iterator_range<SmallVectorImpl<unsigned>::iterator>
getVRegsMem(unsigned OpIdx);
/// Get the end iterator for a range starting at \p StartIdx and
/// spannig \p NumVal in NewVRegs.
/// \pre StartIdx + NumVal <= NewVRegs.size()
SmallVectorImpl<unsigned>::const_iterator
getNewVRegsEnd(unsigned StartIdx, unsigned NumVal) const;
SmallVectorImpl<unsigned>::iterator getNewVRegsEnd(unsigned StartIdx,
unsigned NumVal);
public:
/// Create an OperandsMapper that will hold the information to apply \p
/// InstrMapping to \p MI.

23
lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
View File

@ -538,13 +538,26 @@ RegisterBankInfo::OperandsMapper::getVRegsMem(unsigned OpIdx) {
NewVRegs.push_back(0);
}
SmallVectorImpl<unsigned>::iterator End =
NewVRegs.size() <= StartIdx + NumPartialVal + 1
? NewVRegs.end()
: &NewVRegs[StartIdx + NumPartialVal + 1];
getNewVRegsEnd(StartIdx, NumPartialVal);
return make_range(&NewVRegs[StartIdx], End);
}
SmallVectorImpl<unsigned>::const_iterator
RegisterBankInfo::OperandsMapper::getNewVRegsEnd(unsigned StartIdx,
unsigned NumVal) const {
return const_cast<OperandsMapper *>(this)->getNewVRegsEnd(StartIdx, NumVal);
}
SmallVectorImpl<unsigned>::iterator
RegisterBankInfo::OperandsMapper::getNewVRegsEnd(unsigned StartIdx,
unsigned NumVal) {
assert((NewVRegs.size() == StartIdx + NumVal ||
NewVRegs.size() > StartIdx + NumVal) &&
"NewVRegs too small to contain all the partial mapping");
return NewVRegs.size() <= StartIdx + NumVal ? NewVRegs.end()
: &NewVRegs[StartIdx + NumVal];
}
void RegisterBankInfo::OperandsMapper::createVRegs(unsigned OpIdx) {
assert(OpIdx < getMI().getNumOperands() && "Out-of-bound access");
iterator_range<SmallVectorImpl<unsigned>::iterator> NewVRegsForOpIdx =
@ -588,9 +601,7 @@ RegisterBankInfo::OperandsMapper::getVRegs(unsigned OpIdx,
unsigned PartMapSize =
getInstrMapping().getOperandMapping(OpIdx).BreakDown.size();
SmallVectorImpl<unsigned>::const_iterator End =
NewVRegs.size() <= StartIdx + PartMapSize + 1
? NewVRegs.end()
: &NewVRegs[StartIdx + PartMapSize + 1];
getNewVRegsEnd(StartIdx, PartMapSize);
iterator_range<SmallVectorImpl<unsigned>::const_iterator> Res =
make_range(&NewVRegs[StartIdx], End);
#ifndef NDEBUG