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Add some notes to myself, no functional changes

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@13695 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2004-05-23 21:23:12 +00:00
parent bbdbf30238
commit df04097f87
2 changed files with 38 additions and 14 deletions
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26
lib/Target/X86/InstSelectSimple.cpp
View File

@ -3567,12 +3567,24 @@ void ISel::getGEPIndex(MachineBasicBlock *MBB, MachineBasicBlock::iterator IP,
}
}
// GEPTypes is empty, which means we have a single operand left. See if we
// can set it as the base register.
// GEPTypes is empty, which means we have a single operand left. Set it as
// the base register.
//
// FIXME: When addressing modes are more powerful/correct, we could load
// global addresses directly as 32-bit immediates.
assert(BaseReg == 0);
#if 0 // FIXME: TODO!
if (AllocaInst *AI = dyn_castFixedAlloca(V)) {
// FIXME: When we can add FrameIndex values as the first operand, we can
// make GEP's of allocas MUCH more efficient!
unsigned FI = getFixedSizedAllocaFI(AI);
GEPOps.pop_back();
return;
} else if (GlobalValue *GV = dyn_cast<GlobalValue>(V)) {
// FIXME: When addressing modes are more powerful/correct, we could load
// global addresses directly as 32-bit immediates.
}
#endif
BaseReg = MBB ? getReg(GEPOps[0], MBB, IP) : 1;
GEPOps.pop_back(); // Consume the last GEP operand
}
@ -3592,9 +3604,9 @@ bool ISel::isGEPFoldable(MachineBasicBlock *MBB,
GEPOps[0] = Src;
std::copy(IdxBegin, IdxEnd, GEPOps.begin()+1);
std::vector<const Type*> GEPTypes;
GEPTypes.assign(gep_type_begin(Src->getType(), IdxBegin, IdxEnd),
gep_type_end(Src->getType(), IdxBegin, IdxEnd));
std::vector<const Type*>
GEPTypes(gep_type_begin(Src->getType(), IdxBegin, IdxEnd),
gep_type_end(Src->getType(), IdxBegin, IdxEnd));
MachineBasicBlock::iterator IP;
if (MBB) IP = MBB->end();

26
lib/Target/X86/X86ISelSimple.cpp
View File

@ -3567,12 +3567,24 @@ void ISel::getGEPIndex(MachineBasicBlock *MBB, MachineBasicBlock::iterator IP,
}
}
// GEPTypes is empty, which means we have a single operand left. See if we
// can set it as the base register.
// GEPTypes is empty, which means we have a single operand left. Set it as
// the base register.
//
// FIXME: When addressing modes are more powerful/correct, we could load
// global addresses directly as 32-bit immediates.
assert(BaseReg == 0);
#if 0 // FIXME: TODO!
if (AllocaInst *AI = dyn_castFixedAlloca(V)) {
// FIXME: When we can add FrameIndex values as the first operand, we can
// make GEP's of allocas MUCH more efficient!
unsigned FI = getFixedSizedAllocaFI(AI);
GEPOps.pop_back();
return;
} else if (GlobalValue *GV = dyn_cast<GlobalValue>(V)) {
// FIXME: When addressing modes are more powerful/correct, we could load
// global addresses directly as 32-bit immediates.
}
#endif
BaseReg = MBB ? getReg(GEPOps[0], MBB, IP) : 1;
GEPOps.pop_back(); // Consume the last GEP operand
}
@ -3592,9 +3604,9 @@ bool ISel::isGEPFoldable(MachineBasicBlock *MBB,
GEPOps[0] = Src;
std::copy(IdxBegin, IdxEnd, GEPOps.begin()+1);
std::vector<const Type*> GEPTypes;
GEPTypes.assign(gep_type_begin(Src->getType(), IdxBegin, IdxEnd),
gep_type_end(Src->getType(), IdxBegin, IdxEnd));
std::vector<const Type*>
GEPTypes(gep_type_begin(Src->getType(), IdxBegin, IdxEnd),
gep_type_end(Src->getType(), IdxBegin, IdxEnd));
MachineBasicBlock::iterator IP;
if (MBB) IP = MBB->end();