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Make reg. numbers signed ints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1137 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -107,9 +107,9 @@ public:
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opType == MO_PCRelativeDisp);
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return value;
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}
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inline unsigned int getMachineRegNum() const {
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inline int getMachineRegNum() const {
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assert(opType == MO_MachineRegister);
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return (unsigned) regNum;
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return regNum;
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}
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inline int64_t getImmedValue () const {
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assert(opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed);
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@ -132,7 +132,7 @@ private:
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Value* _val);
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void InitializeConst (MachineOperandType operandType,
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int64_t intValue);
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void InitializeReg (unsigned int regNum);
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void InitializeReg (int regNum);
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friend class MachineInstr;
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friend class ValOpIterator<const MachineInstr, const Value>;
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@ -215,7 +215,7 @@ MachineOperand::InitializeConst(MachineOperandType operandType,
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}
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inline void
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MachineOperand::InitializeReg(unsigned int _regNum)
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MachineOperand::InitializeReg(int _regNum)
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{
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opType = MO_MachineRegister;
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value = NULL;
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@ -309,7 +309,7 @@ public:
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MachineOperand::MachineOperandType operandType,
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int64_t intValue, bool isDef=false);
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void SetMachineOperand(unsigned int i,
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unsigned int regNum,
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int regNum,
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bool isDef=false);
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void addImplicitRef (Value* val,
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@ -66,7 +66,7 @@ MachineInstr::SetMachineOperand(unsigned int i,
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void
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MachineInstr::SetMachineOperand(unsigned int i,
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unsigned int regNum, bool isdef=false)
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int regNum, bool isdef=false)
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{
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assert(i < operands.size());
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operands[i].InitializeReg(regNum);
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