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Remember to promote load/store types for stack to register size.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115984 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2010-10-07 21:40:18 +00:00
parent 9649e9acdd
commit df1f5a924e
1 changed files with 6 additions and 0 deletions
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6
lib/Target/ARM/ARMFastISel.cpp
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@ -629,6 +629,9 @@ bool ARMFastISel::ARMComputeRegOffset(const Value *Obj, unsigned &Reg,
bool ARMFastISel::ARMLoadAlloca(const Instruction *I, EVT VT) {
Value *Op0 = I->getOperand(0);
// Promote load/store types.
if (VT == MVT::i8 || VT == MVT::i16) VT = MVT::i32;
// Verify it's an alloca.
if (const AllocaInst *AI = dyn_cast<AllocaInst>(Op0)) {
DenseMap<const AllocaInst*, int>::iterator SI =
@ -735,6 +738,9 @@ bool ARMFastISel::SelectLoad(const Instruction *I) {
bool ARMFastISel::ARMStoreAlloca(const Instruction *I, unsigned SrcReg, EVT VT){
Value *Op1 = I->getOperand(1);
// Promote load/store types.
if (VT == MVT::i8 || VT == MVT::i16) VT = MVT::i32;
// Verify it's an alloca.
if (const AllocaInst *AI = dyn_cast<AllocaInst>(Op1)) {
DenseMap<const AllocaInst*, int>::iterator SI =