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Make helper functions/classes/globals static. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228410 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -83,6 +83,8 @@ void StringSaver::anchor() {}
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//===----------------------------------------------------------------------===//
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namespace {
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class CommandLineParser {
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public:
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// Globals for name and overview of program. Program name is not a string to
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@ -190,6 +192,8 @@ public:
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void printOptionValues();
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};
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} // namespace
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static ManagedStatic<CommandLineParser> GlobalParser;
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void cl::AddLiteralOption(Option &O, const char *Name) {
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@ -186,9 +186,9 @@ static bool CC_MipsO32_FP32(unsigned ValNo, MVT ValVT, MVT LocVT,
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llvm_unreachable("should not be called");
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}
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bool CC_MipsO32_FP64(unsigned ValNo, MVT ValVT, MVT LocVT,
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CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
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CCState &State) {
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static bool CC_MipsO32_FP64(unsigned ValNo, MVT ValVT, MVT LocVT,
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CCValAssign::LocInfo LocInfo,
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ISD::ArgFlagsTy ArgFlags, CCState &State) {
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llvm_unreachable("should not be called");
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}
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@ -42,11 +42,15 @@ using namespace llvm;
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cl::opt<bool> ANDIGlueBug("expose-ppc-andi-glue-bug",
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cl::desc("expose the ANDI glue bug on PPC"), cl::Hidden);
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cl::opt<bool> UseBitPermRewriter("ppc-use-bit-perm-rewriter", cl::init(true),
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cl::desc("use aggressive ppc isel for bit permutations"), cl::Hidden);
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cl::opt<bool> BPermRewriterNoMasking("ppc-bit-perm-rewriter-stress-rotates",
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cl::desc("stress rotate selection in aggressive ppc isel for "
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"bit permutations"), cl::Hidden);
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static cl::opt<bool>
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UseBitPermRewriter("ppc-use-bit-perm-rewriter", cl::init(true),
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cl::desc("use aggressive ppc isel for bit permutations"),
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cl::Hidden);
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static cl::opt<bool> BPermRewriterNoMasking(
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"ppc-bit-perm-rewriter-stress-rotates",
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cl::desc("stress rotate selection in aggressive ppc isel for "
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"bit permutations"),
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cl::Hidden);
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namespace llvm {
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void initializePPCDAGToDAGISelPass(PassRegistry&);
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@ -88,7 +88,7 @@ namespace {
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}
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char PPCLoopPreIncPrep::ID = 0;
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const char *name = "Prepare loop for pre-inc. addressing modes";
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static const char *name = "Prepare loop for pre-inc. addressing modes";
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INITIALIZE_PASS_BEGIN(PPCLoopPreIncPrep, DEBUG_TYPE, name, false, false)
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INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass)
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INITIALIZE_PASS_DEPENDENCY(ScalarEvolution)
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@ -350,7 +350,7 @@ enum SISubtarget {
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VI = 1
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};
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enum SISubtarget AMDGPUSubtargetToSISubtarget(unsigned Gen) {
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static enum SISubtarget AMDGPUSubtargetToSISubtarget(unsigned Gen) {
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switch (Gen) {
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default:
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return SI;
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@ -37,9 +37,10 @@ using namespace llvm;
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#define DEBUG_TYPE "x86-cf-opt"
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cl::opt<bool> NoX86CFOpt("no-x86-call-frame-opt",
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cl::desc("Avoid optimizing x86 call frames for size"),
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cl::init(false), cl::Hidden);
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static cl::opt<bool>
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NoX86CFOpt("no-x86-call-frame-opt",
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cl::desc("Avoid optimizing x86 call frames for size"),
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cl::init(false), cl::Hidden);
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namespace {
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class X86CallFrameOptimization : public MachineFunctionPass {
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@ -76,11 +76,11 @@
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using namespace llvm;
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cl::opt<unsigned> LoopSizeCutoff("irce-loop-size-cutoff", cl::Hidden,
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cl::init(64));
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static cl::opt<unsigned> LoopSizeCutoff("irce-loop-size-cutoff", cl::Hidden,
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cl::init(64));
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cl::opt<bool> PrintChangedLoops("irce-print-changed-loops", cl::Hidden,
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cl::init(false));
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static cl::opt<bool> PrintChangedLoops("irce-print-changed-loops", cl::Hidden,
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cl::init(false));
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#define DEBUG_TYPE "irce"
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@ -104,7 +104,7 @@ static cl::opt<bool> SkipCounted("spp-counted", cl::init(true));
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static cl::opt<bool> SplitBackedge("spp-split-backedge", cl::init(false));
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// Print tracing output
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cl::opt<bool> TraceLSP("spp-trace", cl::init(false));
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static cl::opt<bool> TraceLSP("spp-trace", cl::init(false));
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namespace {
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