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Make PPC64CompilationCallback compilable no non-darwin platforms.
Patch by Nathan Whitehorn! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133059 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -87,7 +87,7 @@ asm(
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// FIXME: could shrink frame
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// Set up a proper stack frame
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// FIXME Layout
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// PowerPC64 ABI linkage - 24 bytes
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// PowerPC32 ABI linkage - 24 bytes
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// parameters - 32 bytes
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// 13 double registers - 104 bytes
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// 8 int registers - 32 bytes
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@ -205,11 +205,27 @@ void PPC32CompilationCallback() {
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#if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && \
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defined(__ppc64__)
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#ifdef __ELF__
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asm(
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".text\n"
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".align 2\n"
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".globl PPC64CompilationCallback\n"
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".section \".opd\",\"aw\"\n"
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".align 3\n"
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"PPC64CompilationCallback:\n"
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".quad .L.PPC64CompilationCallback,.TOC.@tocbase,0\n"
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".size PPC64CompilationCallback,24\n"
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".previous\n"
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".align 4\n"
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".type PPC64CompilationCallback,@function\n"
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".L.PPC64CompilationCallback:\n"
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#else
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asm(
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".text\n"
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".align 2\n"
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".globl _PPC64CompilationCallback\n"
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"_PPC64CompilationCallback:\n"
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#endif
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// Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the
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// FIXME: need to save v[0-19] for altivec?
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// Set up a proper stack frame
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@ -218,49 +234,55 @@ asm(
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// parameters - 64 bytes
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// 13 double registers - 104 bytes
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// 8 int registers - 64 bytes
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"mflr r0\n"
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"std r0, 16(r1)\n"
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"stdu r1, -280(r1)\n"
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"mflr 0\n"
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"std 0, 16(1)\n"
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"stdu 1, -280(1)\n"
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// Save all int arg registers
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"std r10, 272(r1)\n" "std r9, 264(r1)\n"
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"std r8, 256(r1)\n" "std r7, 248(r1)\n"
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"std r6, 240(r1)\n" "std r5, 232(r1)\n"
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"std r4, 224(r1)\n" "std r3, 216(r1)\n"
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"std 10, 272(1)\n" "std 9, 264(1)\n"
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"std 8, 256(1)\n" "std 7, 248(1)\n"
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"std 6, 240(1)\n" "std 5, 232(1)\n"
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"std 4, 224(1)\n" "std 3, 216(1)\n"
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// Save all call-clobbered FP regs.
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"stfd f13, 208(r1)\n" "stfd f12, 200(r1)\n"
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"stfd f11, 192(r1)\n" "stfd f10, 184(r1)\n"
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"stfd f9, 176(r1)\n" "stfd f8, 168(r1)\n"
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"stfd f7, 160(r1)\n" "stfd f6, 152(r1)\n"
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"stfd f5, 144(r1)\n" "stfd f4, 136(r1)\n"
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"stfd f3, 128(r1)\n" "stfd f2, 120(r1)\n"
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"stfd f1, 112(r1)\n"
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"stfd 13, 208(1)\n" "stfd 12, 200(1)\n"
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"stfd 11, 192(1)\n" "stfd 10, 184(1)\n"
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"stfd 9, 176(1)\n" "stfd 8, 168(1)\n"
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"stfd 7, 160(1)\n" "stfd 6, 152(1)\n"
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"stfd 5, 144(1)\n" "stfd 4, 136(1)\n"
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"stfd 3, 128(1)\n" "stfd 2, 120(1)\n"
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"stfd 1, 112(1)\n"
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// Arguments to Compilation Callback:
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// r3 - our lr (address of the call instruction in stub plus 4)
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// r4 - stub's lr (address of instruction that called the stub plus 4)
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// r5 - is64Bit - always 1.
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"mr r3, r0\n"
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"ld r2, 280(r1)\n" // stub's frame
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"ld r4, 16(r2)\n" // stub's lr
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"li r5, 1\n" // 1 == 64 bit
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"mr 3, 0\n" // return address (still in r0)
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"ld 5, 280(1)\n" // stub's frame
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"ld 4, 16(5)\n" // stub's lr
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"li 5, 1\n" // 1 == 64 bit
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#ifdef __ELF__
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"bl PPCCompilationCallbackC\n"
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"nop\n"
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#else
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"bl _PPCCompilationCallbackC\n"
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"mtctr r3\n"
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#endif
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"mtctr 3\n"
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// Restore all int arg registers
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"ld r10, 272(r1)\n" "ld r9, 264(r1)\n"
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"ld r8, 256(r1)\n" "ld r7, 248(r1)\n"
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"ld r6, 240(r1)\n" "ld r5, 232(r1)\n"
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"ld r4, 224(r1)\n" "ld r3, 216(r1)\n"
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"ld 10, 272(1)\n" "ld 9, 264(1)\n"
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"ld 8, 256(1)\n" "ld 7, 248(1)\n"
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"ld 6, 240(1)\n" "ld 5, 232(1)\n"
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"ld 4, 224(1)\n" "ld 3, 216(1)\n"
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// Restore all FP arg registers
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"lfd f13, 208(r1)\n" "lfd f12, 200(r1)\n"
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"lfd f11, 192(r1)\n" "lfd f10, 184(r1)\n"
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"lfd f9, 176(r1)\n" "lfd f8, 168(r1)\n"
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"lfd f7, 160(r1)\n" "lfd f6, 152(r1)\n"
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"lfd f5, 144(r1)\n" "lfd f4, 136(r1)\n"
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"lfd f3, 128(r1)\n" "lfd f2, 120(r1)\n"
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"lfd f1, 112(r1)\n"
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"lfd 13, 208(1)\n" "lfd 12, 200(1)\n"
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"lfd 11, 192(1)\n" "lfd 10, 184(1)\n"
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"lfd 9, 176(1)\n" "lfd 8, 168(1)\n"
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"lfd 7, 160(1)\n" "lfd 6, 152(1)\n"
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"lfd 5, 144(1)\n" "lfd 4, 136(1)\n"
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"lfd 3, 128(1)\n" "lfd 2, 120(1)\n"
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"lfd 1, 112(1)\n"
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// Pop 3 frames off the stack and branch to target
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"ld r1, 280(r1)\n"
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"ld r2, 16(r1)\n"
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"mtlr r2\n"
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"ld 1, 280(1)\n"
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"ld 0, 16(1)\n"
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"mtlr 0\n"
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// XXX: any special TOC handling in the ELF case for JIT?
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"bctr\n"
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);
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#else
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