[TableGen] Replace instructions() with getInstructionsByEnumValue(). No need to make an iterator_range when we already have a function that returns an ArrayRef. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258019 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2016-01-17 20:38:18 +00:00
parent 3356fb6f86
commit e4b8552199
5 changed files with 8 additions and 11 deletions

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@ -1400,7 +1400,7 @@ void AsmMatcherInfo::buildInfo() {
AsmVariant->getValueAsString("BreakCharacters");
Variant.AsmVariantNo = AsmVariant->getValueAsInt("Variant");
for (const CodeGenInstruction *CGI : Target.instructions()) {
for (const CodeGenInstruction *CGI : Target.getInstructionsByEnumValue()) {
// If the tblgen -match-prefix option is specified (for tblgen hackers),
// filter the set of instructions we consider.

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@ -68,7 +68,7 @@ struct InstRegexOp : public SetTheory::Operator {
}
RegexList.push_back(Regex(pat));
}
for (const CodeGenInstruction *Inst : Target.instructions()) {
for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) {
for (auto &R : RegexList) {
if (R.match(Inst->TheDef->getName()))
Elts.insert(Inst->TheDef);
@ -204,7 +204,7 @@ void CodeGenSchedModels::collectSchedRW() {
// Find all SchedReadWrites referenced by instruction defs.
RecVec SWDefs, SRDefs;
for (const CodeGenInstruction *Inst : Target.instructions()) {
for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) {
Record *SchedDef = Inst->TheDef;
if (SchedDef->isValueUnset("SchedRW"))
continue;
@ -498,7 +498,7 @@ void CodeGenSchedModels::collectSchedClasses() {
// Create a SchedClass for each unique combination of itinerary class and
// SchedRW list.
for (const CodeGenInstruction *Inst : Target.instructions()) {
for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) {
Record *ItinDef = Inst->TheDef->getValueAsDef("Itinerary");
IdxVec Writes, Reads;
if (!Inst->TheDef->isValueUnset("SchedRW"))
@ -523,7 +523,7 @@ void CodeGenSchedModels::collectSchedClasses() {
if (!EnableDump)
return;
for (const CodeGenInstruction *Inst : Target.instructions()) {
for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) {
std::string InstName = Inst->TheDef->getName();
unsigned SCIdx = InstrClassMap.lookup(Inst->TheDef);
if (!SCIdx) {

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@ -162,7 +162,7 @@ const std::string &CodeGenTarget::getName() const {
}
std::string CodeGenTarget::getInstNamespace() const {
for (const CodeGenInstruction *Inst : instructions()) {
for (const CodeGenInstruction *Inst : getInstructionsByEnumValue()) {
// Make sure not to pick up "TargetOpcode" by accidentally getting
// the namespace off the PHI instruction or something.
if (Inst->Namespace != "TargetOpcode")

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@ -170,9 +170,6 @@ public:
typedef ArrayRef<const CodeGenInstruction *>::const_iterator inst_iterator;
inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();}
inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }
iterator_range<inst_iterator> instructions() const {
return make_range(inst_begin(), inst_end());
}
/// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?

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@ -177,7 +177,7 @@ void InstrInfoEmitter::EmitOperandInfo(raw_ostream &OS,
OS << "\n";
const CodeGenTarget &Target = CDP.getTargetInfo();
for (const CodeGenInstruction *Inst : Target.instructions()) {
for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) {
std::vector<std::string> OperandInfo = GetOperandInfo(*Inst);
unsigned &N = OperandInfoIDs[OperandInfo];
if (N != 0) continue;
@ -358,7 +358,7 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
unsigned ListNumber = 0;
// Emit all of the instruction's implicit uses and defs.
for (const CodeGenInstruction *II : Target.instructions()) {
for (const CodeGenInstruction *II : Target.getInstructionsByEnumValue()) {
Record *Inst = II->TheDef;
std::vector<Record*> Uses = Inst->getValueAsListOfDefs("Uses");
if (!Uses.empty()) {