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Pacify gcc-4.3, which suggests explicit braces here

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to avoid an ambiguous else.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71924 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Duncan Sands 2009-05-16 03:28:54 +00:00
parent f8eac02fc1
commit e556720ea8
1 changed files with 2 additions and 1 deletions
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3
lib/CodeGen/MachineVerifier.cpp
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@ -345,7 +345,7 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum)
addRegWithSubRegs(regsKilled, Reg); addRegWithSubRegs(regsKilled, Reg);
} }
// Explicit use of a dead register. // Explicit use of a dead register.
if (!MO->isImplicit() && !regsLive.count(Reg)) if (!MO->isImplicit() && !regsLive.count(Reg)) {
if (TargetRegisterInfo::isPhysicalRegister(Reg)) { if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
// Reserved registers may be used even when 'dead'. // Reserved registers may be used even when 'dead'.
if (!isReserved(Reg)) if (!isReserved(Reg))
@ -360,6 +360,7 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum)
else if (MI->getOpcode() != TargetInstrInfo::PHI) else if (MI->getOpcode() != TargetInstrInfo::PHI)
MInfo.vregsLiveIn.insert(std::make_pair(Reg, MI)); MInfo.vregsLiveIn.insert(std::make_pair(Reg, MI));
} }
}
} else { } else {
// Register defined. // Register defined.
// TODO: verify that earlyclobber ops are not used. // TODO: verify that earlyclobber ops are not used.