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[AArch64LoadStoreOptimizer] Don't treat write to XZR/WZR as a clobber.

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Summary:
When searching for load/store instructions to pair/merge don't treat
writes to WZR/XZR as clobbers since they don't change the value read
from WZR/XZR (which is always 0).

Reviewers: mcrosier, junbuml, jmolloy, t.p.northover

Subscribers: aemerson, llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D26921

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@287592 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Geoff Berry 2016-11-21 22:51:10 +00:00
parent 09220c80d3
commit e6b0810799
2 changed files with 31 additions and 2 deletions
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6
lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
View File

@ -863,8 +863,10 @@ static void trackRegDefsUses(const MachineInstr &MI, BitVector &ModifiedRegs,
if (!Reg)
continue;
if (MO.isDef()) {
for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
ModifiedRegs.set(*AI);
// WZR/XZR are not modified even when used as a destination register.
if (Reg != AArch64::WZR && Reg != AArch64::XZR)
for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
ModifiedRegs.set(*AI);
} else {
assert(MO.isUse() && "Reg operand not a def and not a use?!?");
for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)

27
test/CodeGen/MIR/AArch64/ldst-opt-zr-clobber.mir Normal file
View File

@ -0,0 +1,27 @@
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass aarch64-ldst-opt -verify-machineinstrs -o - %s | FileCheck %s
--- |
define i1 @no-clobber-zr(i64* %p, i64 %x) { ret i1 0 }
...
---
# Check that write of xzr doesn't inhibit pairing of xzr stores since
# it isn't actually clobbered. Written as a MIR test to avoid
# schedulers reordering instructions such that SUBS doesn't appear
# between stores.
# CHECK-LABEL: name: no-clobber-zr
# CHECK: STPXi %xzr, %xzr, %x0, 0
name: no-clobber-zr
body: |
bb.0:
liveins: %x0, %x1
STRXui %xzr, %x0, 0 :: (store 8 into %ir.p)
dead %xzr = SUBSXri killed %x1, 0, 0, implicit-def %nzcv
%w8 = CSINCWr %wzr, %wzr, 1, implicit killed %nzcv
STRXui %xzr, killed %x0, 1 :: (store 8 into %ir.p)
%w0 = ORRWrs %wzr, killed %w8, 0
RET %lr, implicit %w0
...