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[InstCombine] Fold nuw left-shifts in ugt
/ule
comparisons.
This transforms %a = shl nuw %x, c1 %b = icmp {ugt|ule} %a, c0 into %b = icmp {ugt|ule} %x, (c0 >> c1) z3: (declare-const x (_ BitVec 64)) (declare-const c0 (_ BitVec 64)) (declare-const c1 (_ BitVec 64)) (push) (assert (= x (bvlshr (bvshl x c1) c1))) ; nuw (assert (not (= (bvugt (bvshl x c1) c0) (bvugt x (bvlshr c0 c1))))) (check-sat) (get-model) (pop) (push) (assert (= x (bvlshr (bvshl x c1) c1))) ; nuw (assert (not (= (bvule (bvshl x c1) c0) (bvule x (bvlshr c0 c1))))) (check-sat) (get-model) (pop) Patch by bryant! Differential Revision: https://reviews.llvm.org/D25913 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285729 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1950,6 +1950,23 @@ Instruction *InstCombiner::foldICmpShlConstant(ICmpInst &Cmp,
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And, Constant::getNullValue(And->getType()));
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}
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// When the shift is nuw and pred is >u or <=u, comparison only really happens
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// in the pre-shifted bits. Since InstSimplify canoncalizes <=u into <u, the
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// <=u case can be further converted to match <u (see below).
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if (Shl->hasNoUnsignedWrap() &&
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(Pred == ICmpInst::ICMP_UGT || Pred == ICmpInst::ICMP_ULT)) {
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// Derivation for the ult case:
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// (X << S) <=u C is equiv to X <=u (C >> S) for all C
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// (X << S) <u (C + 1) is equiv to X <u (C >> S) + 1 if C <u ~0u
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// (X << S) <u C is equiv to X <u ((C - 1) >> S) + 1 if C >u 0
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assert((Pred != ICmpInst::ICMP_ULT || C->ugt(0)) &&
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"Encountered `ult 0` that should have been eliminated by "
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"InstSimplify.");
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APInt ShiftedC = Pred == ICmpInst::ICMP_ULT ? (*C - 1).lshr(*ShiftAmt) + 1
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: C->lshr(*ShiftAmt);
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return new ICmpInst(Pred, X, ConstantInt::get(X->getType(), ShiftedC));
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}
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// Transform (icmp pred iM (shl iM %v, N), C)
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// -> (icmp pred i(M-N) (trunc %v iM to i(M-N)), (trunc (C>>N))
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// Transform the shl to a trunc if (trunc (C>>N)) has no loss and M-N.
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@ -3,8 +3,7 @@
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define i1 @icmp_ugt_32(i64) {
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; CHECK-LABEL: @icmp_ugt_32(
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; CHECK-NEXT: [[C:%.*]] = shl nuw i64 %0, 32
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; CHECK-NEXT: [[D:%.*]] = icmp ugt i64 [[C]], 4294967295
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; CHECK-NEXT: [[D:%.*]] = icmp ne i64 %0, 0
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; CHECK-NEXT: ret i1 [[D]]
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;
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%c = shl nuw i64 %0, 32
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@ -14,8 +13,7 @@ define i1 @icmp_ugt_32(i64) {
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define i1 @icmp_ule_64(i128) {
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; CHECK-LABEL: @icmp_ule_64(
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; CHECK-NEXT: [[C:%.*]] = shl nuw i128 %0, 64
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; CHECK-NEXT: [[D:%.*]] = icmp ult i128 [[C]], 18446744073709551616
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; CHECK-NEXT: [[D:%.*]] = icmp eq i128 %0, 0
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; CHECK-NEXT: ret i1 [[D]]
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;
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%c = shl nuw i128 %0, 64
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@ -25,8 +23,7 @@ define i1 @icmp_ule_64(i128) {
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define i1 @icmp_ugt_16(i64) {
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; CHECK-LABEL: @icmp_ugt_16(
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; CHECK-NEXT: [[C:%.*]] = shl nuw i64 %0, 16
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; CHECK-NEXT: [[D:%.*]] = icmp ugt i64 [[C]], 1048575
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; CHECK-NEXT: [[D:%.*]] = icmp ugt i64 %0, 15
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; CHECK-NEXT: ret i1 [[D]]
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;
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%c = shl nuw i64 %0, 16
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@ -36,8 +33,7 @@ define i1 @icmp_ugt_16(i64) {
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define <2 x i1> @icmp_ule_16x2(<2 x i64>) {
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; CHECK-LABEL: @icmp_ule_16x2(
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; CHECK-NEXT: [[C:%.*]] = shl nuw <2 x i64> %0, <i64 16, i64 16>
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; CHECK-NEXT: [[D:%.*]] = icmp ult <2 x i64> [[C]], <i64 65536, i64 65536>
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; CHECK-NEXT: [[D:%.*]] = icmp eq <2 x i64> %0, zeroinitializer
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; CHECK-NEXT: ret <2 x i1> [[D]]
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;
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%c = shl nuw <2 x i64> %0, <i64 16, i64 16>
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@ -45,10 +41,29 @@ define <2 x i1> @icmp_ule_16x2(<2 x i64>) {
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ret <2 x i1> %d
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}
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define <2 x i1> @icmp_ule_16x2_nonzero(<2 x i64>) {
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; CHECK-LABEL: @icmp_ule_16x2_nonzero(
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; CHECK-NEXT: [[D:%.*]] = icmp ult <2 x i64> %0, <i64 4, i64 4>
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; CHECK-NEXT: ret <2 x i1> [[D]]
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;
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%c = shl nuw <2 x i64> %0, <i64 16, i64 16>
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%d = icmp ule <2 x i64> %c, <i64 196608, i64 196608> ; 0x03_0000
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ret <2 x i1> %d
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}
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define <2 x i1> @icmp_ule_12x2(<2 x i64>) {
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; CHECK-LABEL: @icmp_ule_12x2(
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; CHECK-NEXT: [[D:%.*]] = icmp ult <2 x i64> %0, <i64 4, i64 4>
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; CHECK-NEXT: ret <2 x i1> [[D]]
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;
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%c = shl nuw <2 x i64> %0, <i64 12, i64 12>
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%d = icmp ule <2 x i64> %c, <i64 12288, i64 12288> ; 0x3000
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ret <2 x i1> %d
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}
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define i1 @icmp_ult_8(i64) {
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; CHECK-LABEL: @icmp_ult_8(
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; CHECK-NEXT: [[C:%.*]] = shl nuw i64 %0, 8
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; CHECK-NEXT: [[D:%.*]] = icmp ult i64 [[C]], 4095
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; CHECK-NEXT: [[D:%.*]] = icmp ult i64 %0, 16
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; CHECK-NEXT: ret i1 [[D]]
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;
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%c = shl nuw i64 %0, 8
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@ -58,8 +73,7 @@ define i1 @icmp_ult_8(i64) {
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define <2 x i1> @icmp_uge_8x2(<2 x i16>) {
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; CHECK-LABEL: @icmp_uge_8x2(
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; CHECK-NEXT: [[C:%.*]] = shl nuw <2 x i16> %0, <i16 8, i16 8>
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; CHECK-NEXT: [[D:%.*]] = icmp ugt <2 x i16> [[C]], <i16 4094, i16 4094>
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; CHECK-NEXT: [[D:%.*]] = icmp ugt <2 x i16> %0, <i16 15, i16 15>
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; CHECK-NEXT: ret <2 x i1> [[D]]
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;
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%c = shl nuw <2 x i16> %0, <i16 8, i16 8>
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@ -69,8 +83,7 @@ define <2 x i1> @icmp_uge_8x2(<2 x i16>) {
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define <2 x i1> @icmp_ugt_16x2(<2 x i32>) {
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; CHECK-LABEL: @icmp_ugt_16x2(
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; CHECK-NEXT: [[C:%.*]] = shl nuw <2 x i32> %0, <i32 16, i32 16>
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; CHECK-NEXT: [[D:%.*]] = icmp ugt <2 x i32> [[C]], <i32 1048575, i32 1048575>
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; CHECK-NEXT: [[D:%.*]] = icmp ugt <2 x i32> %0, <i32 15, i32 15>
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; CHECK-NEXT: ret <2 x i1> [[D]]
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;
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%c = shl nuw <2 x i32> %0, <i32 16, i32 16>
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