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AMDGPU: Add frexp_exp intrinsic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@264944 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Arsenault
parent
f965621c5f
commit
e8cd894c28
@ -123,6 +123,10 @@ def int_amdgcn_frexp_mant : Intrinsic<
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[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]
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>;
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def int_amdgcn_frexp_exp : Intrinsic<
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[llvm_i32_ty], [llvm_anyfloat_ty], [IntrNoMem]
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>;
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def int_amdgcn_class : Intrinsic<
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[llvm_i1_ty], [llvm_anyfloat_ty, llvm_i32_ty], [IntrNoMem]
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>;
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@ -1344,7 +1344,7 @@ defm V_FFBH_U32 : VOP1Inst <vop1<0x39, 0x2d>, "v_ffbh_u32", VOP_I32_I32>;
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defm V_FFBL_B32 : VOP1Inst <vop1<0x3a, 0x2e>, "v_ffbl_b32", VOP_I32_I32>;
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defm V_FFBH_I32 : VOP1Inst <vop1<0x3b, 0x2f>, "v_ffbh_i32", VOP_I32_I32>;
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defm V_FREXP_EXP_I32_F64 : VOP1Inst <vop1<0x3c,0x30>, "v_frexp_exp_i32_f64",
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VOP_I32_F64
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VOP_I32_F64, int_amdgcn_frexp_exp
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>;
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let SchedRW = [WriteDoubleAdd] in {
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@ -1359,7 +1359,7 @@ defm V_FRACT_F64 : VOP1Inst <vop1<0x3e, 0x32>, "v_fract_f64",
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defm V_FREXP_EXP_I32_F32 : VOP1Inst <vop1<0x3f, 0x33>, "v_frexp_exp_i32_f32",
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VOP_I32_F32
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VOP_I32_F32, int_amdgcn_frexp_exp
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>;
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defm V_FREXP_MANT_F32 : VOP1Inst <vop1<0x40, 0x34>, "v_frexp_mant_f32",
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VOP_F32_F32, int_amdgcn_frexp_mant
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@ -1846,17 +1846,28 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
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break;
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}
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case Intrinsic::amdgcn_frexp_mant: {
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case Intrinsic::amdgcn_frexp_mant:
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case Intrinsic::amdgcn_frexp_exp: {
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Value *Src = II->getArgOperand(0);
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if (const ConstantFP *C = dyn_cast<ConstantFP>(Src)) {
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int Exp;
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APFloat Significand = frexp(C->getValueAPF(), Exp,
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APFloat::rmNearestTiesToEven);
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return replaceInstUsesWith(CI, ConstantFP::get(II->getContext(),
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Significand));
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} else if (isa<UndefValue>(Src))
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return replaceInstUsesWith(CI, Src);
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if (II->getIntrinsicID() == Intrinsic::amdgcn_frexp_mant) {
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return replaceInstUsesWith(CI, ConstantFP::get(II->getContext(),
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Significand));
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}
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// Match instruction special case behavior.
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if (Exp == APFloat::IEK_NaN || Exp == APFloat::IEK_Inf)
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Exp = 0;
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return replaceInstUsesWith(CI, ConstantInt::get(II->getType(), Exp));
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}
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if (isa<UndefValue>(Src))
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return replaceInstUsesWith(CI, UndefValue::get(II->getType()));
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break;
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}
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64
test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.ll
Normal file
64
test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.ll
Normal file
@ -0,0 +1,64 @@
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; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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declare float @llvm.fabs.f32(float) #0
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declare double @llvm.fabs.f64(double) #0
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declare i32 @llvm.amdgcn.frexp.exp.f32(float) #0
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declare i32 @llvm.amdgcn.frexp.exp.f64(double) #0
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; GCN-LABEL: {{^}}s_test_frexp_exp_f32:
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; GCN: v_frexp_exp_i32_f32_e32 {{v[0-9]+}}, {{s[0-9]+}}
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define void @s_test_frexp_exp_f32(i32 addrspace(1)* %out, float %src) #1 {
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%frexp.exp = call i32 @llvm.amdgcn.frexp.exp.f32(float %src)
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store i32 %frexp.exp, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}s_test_fabs_frexp_exp_f32:
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; GCN: v_frexp_exp_i32_f32_e64 {{v[0-9]+}}, |{{s[0-9]+}}|
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define void @s_test_fabs_frexp_exp_f32(i32 addrspace(1)* %out, float %src) #1 {
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%fabs.src = call float @llvm.fabs.f32(float %src)
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%frexp.exp = call i32 @llvm.amdgcn.frexp.exp.f32(float %fabs.src)
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store i32 %frexp.exp, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}s_test_fneg_fabs_frexp_exp_f32:
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; GCN: v_frexp_exp_i32_f32_e64 {{v[0-9]+}}, -|{{s[0-9]+}}|
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define void @s_test_fneg_fabs_frexp_exp_f32(i32 addrspace(1)* %out, float %src) #1 {
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%fabs.src = call float @llvm.fabs.f32(float %src)
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%fneg.fabs.src = fsub float -0.0, %fabs.src
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%frexp.exp = call i32 @llvm.amdgcn.frexp.exp.f32(float %fneg.fabs.src)
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store i32 %frexp.exp, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}s_test_frexp_exp_f64:
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; GCN: v_frexp_exp_i32_f64_e32 {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}
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define void @s_test_frexp_exp_f64(i32 addrspace(1)* %out, double %src) #1 {
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%frexp.exp = call i32 @llvm.amdgcn.frexp.exp.f64(double %src)
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store i32 %frexp.exp, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}s_test_fabs_frexp_exp_f64:
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; GCN: v_frexp_exp_i32_f64_e64 {{v[0-9]+}}, |{{s\[[0-9]+:[0-9]+\]}}|
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define void @s_test_fabs_frexp_exp_f64(i32 addrspace(1)* %out, double %src) #1 {
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%fabs.src = call double @llvm.fabs.f64(double %src)
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%frexp.exp = call i32 @llvm.amdgcn.frexp.exp.f64(double %fabs.src)
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store i32 %frexp.exp, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}s_test_fneg_fabs_frexp_exp_f64:
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; GCN: v_frexp_exp_i32_f64_e64 {{v[0-9]+}}, -|{{s\[[0-9]+:[0-9]+\]}}|
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define void @s_test_fneg_fabs_frexp_exp_f64(i32 addrspace(1)* %out, double %src) #1 {
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%fabs.src = call double @llvm.fabs.f64(double %src)
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%fneg.fabs.src = fsub double -0.0, %fabs.src
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%frexp.exp = call i32 @llvm.amdgcn.frexp.exp.f64(double %fneg.fabs.src)
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store i32 %frexp.exp, i32 addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind }
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@ -200,3 +200,165 @@ define double @test_constant_fold_frexp_mant_f64_min_num() nounwind {
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ret double %val
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}
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; --------------------------------------------------------------------
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; llvm.amdgcn.frexp.exp
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; --------------------------------------------------------------------
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declare i32 @llvm.amdgcn.frexp.exp.f32(float) nounwind readnone
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declare i32 @llvm.amdgcn.frexp.exp.f64(double) nounwind readnone
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_undef(
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; CHECK-NEXT: ret i32 undef
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define i32 @test_constant_fold_frexp_exp_f32_undef() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float undef)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_undef(
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; CHECK-NEXT: ret i32 undef
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define i32 @test_constant_fold_frexp_exp_f64_undef() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double undef)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_0(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f32_0() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 0.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_0(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f64_0() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 0.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_n0(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f32_n0() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float -0.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_n0(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f64_n0() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double -0.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_1024(
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; CHECK-NEXT: ret i32 11
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define i32 @test_constant_fold_frexp_exp_f32_1024() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 1024.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_1024(
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; CHECK-NEXT: ret i32 11
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define i32 @test_constant_fold_frexp_exp_f64_1024() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 1024.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_n1024(
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; CHECK-NEXT: ret i32 11
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define i32 @test_constant_fold_frexp_exp_f32_n1024() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float -1024.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_n1024(
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; CHECK-NEXT: ret i32 11
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define i32 @test_constant_fold_frexp_exp_f64_n1024() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double -1024.0)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_1_1024(
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; CHECK-NEXT: ret i32 -9
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define i32 @test_constant_fold_frexp_exp_f32_1_1024() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 0.0009765625)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_1_1024(
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; CHECK-NEXT: ret i32 -9
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define i32 @test_constant_fold_frexp_exp_f64_1_1024() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 0.0009765625)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_nan(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f32_nan() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 0x7FF8000000000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_nan(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f64_nan() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 0x7FF8000000000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_inf(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f32_inf() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 0x7FF0000000000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_inf(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f64_inf() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 0x7FF0000000000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_ninf(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f32_ninf() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 0xFFF0000000000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_ninf(
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; CHECK-NEXT: ret i32 0
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define i32 @test_constant_fold_frexp_exp_f64_ninf() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 0xFFF0000000000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_max_num(
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; CHECK-NEXT: ret i32 128
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define i32 @test_constant_fold_frexp_exp_f32_max_num() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 0x47EFFFFFE0000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_max_num(
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; CHECK-NEXT: ret i32 1024
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define i32 @test_constant_fold_frexp_exp_f64_max_num() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 0x7FEFFFFFFFFFFFFF)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f32_min_num(
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; CHECK-NEXT: ret i32 -148
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define i32 @test_constant_fold_frexp_exp_f32_min_num() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f32(float 0x36A0000000000000)
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ret i32 %val
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}
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; CHECK-LABEL: @test_constant_fold_frexp_exp_f64_min_num(
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; CHECK-NEXT: ret i32 -1073
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define i32 @test_constant_fold_frexp_exp_f64_min_num() nounwind {
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%val = call i32 @llvm.amdgcn.frexp.exp.f64(double 4.940656e-324)
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ret i32 %val
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}
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