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[AArch64] Improve cost model to handle sdiv by a pow-of-two.

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This patch improves the target-specific cost model to better handle signed
division by a power of two. The immediate result is that this enables the SLP
vectorizer to do a better job.

http://reviews.llvm.org/D5469
PR20714

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218607 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier 2014-09-29 13:59:31 +00:00
parent 97552d7c1c
commit ea64dce261
2 changed files with 65 additions and 0 deletions
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23
lib/Target/AArch64/AArch64TargetTransformInfo.cpp
View File

@ -413,6 +413,29 @@ unsigned AArch64TTI::getArithmeticInstrCost(
int ISD = TLI->InstructionOpcodeToISD(Opcode);
if (ISD == ISD::SDIV &&
Opd2Info == TargetTransformInfo::OK_UniformConstantValue &&
Opd2PropInfo == TargetTransformInfo::OP_PowerOf2) {
// On AArch64, scalar signed division by constants power-of-two are
// normally expanded to the sequence ADD + CMP + SELECT + SRA.
// The OperandValue properties many not be same as that of previous
// operation; conservatively assume OP_None.
unsigned Cost =
getArithmeticInstrCost(Instruction::Add, Ty, Opd1Info, Opd2Info,
TargetTransformInfo::OP_None,
TargetTransformInfo::OP_None);
Cost += getArithmeticInstrCost(Instruction::Sub, Ty, Opd1Info, Opd2Info,
TargetTransformInfo::OP_None,
TargetTransformInfo::OP_None);
Cost += getArithmeticInstrCost(Instruction::Select, Ty, Opd1Info, Opd2Info,
TargetTransformInfo::OP_None,
TargetTransformInfo::OP_None);
Cost += getArithmeticInstrCost(Instruction::AShr, Ty, Opd1Info, Opd2Info,
TargetTransformInfo::OP_None,
TargetTransformInfo::OP_None);
return Cost;
}
switch (ISD) {
default:
return TargetTransformInfo::getArithmeticInstrCost(

42
test/Transforms/SLPVectorizer/AArch64/sdiv-pow2.ll Normal file
View File

@ -0,0 +1,42 @@
; RUN: opt < %s -basicaa -slp-vectorizer -S -mtriple=aarch64-unknown-linux-gnu -mcpu=cortex-a57 | FileCheck %s
target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-gnu"
; CHECK-LABEL: @test1
; CHECK: load <4 x i32>
; CHECK: add nsw <4 x i32>
; CHECK: sdiv <4 x i32>
define void @test1(i32* noalias nocapture %a, i32* noalias nocapture readonly %b, i32* noalias nocapture readonly %c) {
entry:
%0 = load i32* %b, align 4
%1 = load i32* %c, align 4
%add = add nsw i32 %1, %0
%div = sdiv i32 %add, 2
store i32 %div, i32* %a, align 4
%arrayidx3 = getelementptr inbounds i32* %b, i64 1
%2 = load i32* %arrayidx3, align 4
%arrayidx4 = getelementptr inbounds i32* %c, i64 1
%3 = load i32* %arrayidx4, align 4
%add5 = add nsw i32 %3, %2
%div6 = sdiv i32 %add5, 2
%arrayidx7 = getelementptr inbounds i32* %a, i64 1
store i32 %div6, i32* %arrayidx7, align 4
%arrayidx8 = getelementptr inbounds i32* %b, i64 2
%4 = load i32* %arrayidx8, align 4
%arrayidx9 = getelementptr inbounds i32* %c, i64 2
%5 = load i32* %arrayidx9, align 4
%add10 = add nsw i32 %5, %4
%div11 = sdiv i32 %add10, 2
%arrayidx12 = getelementptr inbounds i32* %a, i64 2
store i32 %div11, i32* %arrayidx12, align 4
%arrayidx13 = getelementptr inbounds i32* %b, i64 3
%6 = load i32* %arrayidx13, align 4
%arrayidx14 = getelementptr inbounds i32* %c, i64 3
%7 = load i32* %arrayidx14, align 4
%add15 = add nsw i32 %7, %6
%div16 = sdiv i32 %add15, 2
%arrayidx17 = getelementptr inbounds i32* %a, i64 3
store i32 %div16, i32* %arrayidx17, align 4
ret void
}