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[SPARC] [SSP] Add support for LOAD_STACK_GUARD.
This fixes PR22248 on sparc. Differential Revision: http://reviews.llvm.org/D19386 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267545 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3302,3 +3302,16 @@ void SparcTargetLowering::ReplaceNodeResults(SDNode *N,
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}
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}
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}
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// Override to enable LOAD_STACK_GUARD lowering on Linux.
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bool SparcTargetLowering::useLoadStackGuardNode() const {
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if (!Subtarget->isTargetLinux())
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return TargetLowering::useLoadStackGuardNode();
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return true;
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}
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// Override to disable global variable loading on Linux.
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void SparcTargetLowering::insertSSPDeclarations(Module &M) const {
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if (!Subtarget->isTargetLinux())
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return TargetLowering::insertSSPDeclarations(M);
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}
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@ -103,6 +103,10 @@ namespace llvm {
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return SP::I1;
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}
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/// Override to support customized stack guard loading.
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bool useLoadStackGuardNode() const override;
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void insertSSPDeclarations(Module &M) const override;
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/// getSetCCResultType - Return the ISD::SETCC ValueType
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EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
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EVT VT) const override;
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@ -491,3 +491,19 @@ unsigned SparcInstrInfo::getGlobalBaseReg(MachineFunction *MF) const
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SparcFI->setGlobalBaseReg(GlobalBaseReg);
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return GlobalBaseReg;
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}
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bool SparcInstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
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switch (MI->getOpcode()) {
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case TargetOpcode::LOAD_STACK_GUARD: {
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assert(Subtarget->isTargetLinux() &&
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"Only Linux target is expected to contain LOAD_STACK_GUARD");
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// offsetof(tcbhead_t, stack_guard) from sysdeps/sparc/nptl/tls.h in glibc.
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const int64_t Offset = Subtarget.is64Bit() ? 0x28 : 0x14;
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MI->setDesc(get(Subtarget.is64Bit() ? SP::LDXri : SP::LDri));
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MachineInstrBuilder(*MI->getParent()->getParent(), MI)
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.addReg(SP::G7).addImm(Offset);
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return true;
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}
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}
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return false;
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}
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@ -97,6 +97,9 @@ public:
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const TargetRegisterInfo *TRI) const override;
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unsigned getGlobalBaseReg(MachineFunction *MF) const;
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// Lower pseudo instructions after register allocation.
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bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const override;
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};
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}
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@ -52,7 +52,7 @@ SparcSubtarget &SparcSubtarget::initializeSubtargetDependencies(StringRef CPU,
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SparcSubtarget::SparcSubtarget(const Triple &TT, const std::string &CPU,
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const std::string &FS, TargetMachine &TM,
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bool is64Bit)
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: SparcGenSubtargetInfo(TT, CPU, FS), Is64Bit(is64Bit),
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: SparcGenSubtargetInfo(TT, CPU, FS), TargetTriple(TT), Is64Bit(is64Bit),
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InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
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FrameLowering(*this) {}
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@ -30,6 +30,7 @@ namespace llvm {
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class StringRef;
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class SparcSubtarget : public SparcGenSubtargetInfo {
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Triple TargetTriple;
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virtual void anchor();
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bool IsV9;
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bool IsLeon;
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@ -89,6 +90,8 @@ public:
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/// returns adjusted framesize which includes space for register window
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/// spills and arguments.
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int getAdjustedFrameSize(int stackSize) const;
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bool isTargetLinux() const { return TargetTriple.isOSLinux(); }
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};
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} // end namespace llvm
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33
test/CodeGen/SPARC/stack-protector.ll
Normal file
33
test/CodeGen/SPARC/stack-protector.ll
Normal file
@ -0,0 +1,33 @@
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; RUN: llc -mtriple=sparc-unknown-linux < %s | FileCheck %s --check-prefix=LINUX-32
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; RUN: llc -mtriple=sparc64-unknown-linux < %s | FileCheck %s --check-prefix=LINUX-64
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; RUN: llc -mtriple=sparc-unknown-solaris < %s | FileCheck %s --check-prefix=GENERIC
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; RUN: llc -mtriple=sparc64-unknown-solaris < %s | FileCheck %s --check-prefix=GENERIC
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; LINUX-32: ld [%g7+20], [[REG1:%[ilo][0-9]*]]
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; LINUX-64: ldx [%g7+40], [[REG1:%[ilo][0-9]*]]
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; LINUX-32-NOT: __stack_chk_guard
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; LINUX-64-NOT: __stack_chk_guard
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; GENERIC: __stack_chk_guard
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@"\01LC" = internal constant [11 x i8] c"buf == %s\0A\00" ; <[11 x i8]*> [#uses=1]
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define void @test(i8* %a) nounwind ssp {
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entry:
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%a_addr = alloca i8* ; <i8**> [#uses=2]
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%buf = alloca [8 x i8] ; <[8 x i8]*> [#uses=2]
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%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
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store i8* %a, i8** %a_addr
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%buf1 = bitcast [8 x i8]* %buf to i8* ; <i8*> [#uses=1]
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%0 = load i8*, i8** %a_addr, align 4 ; <i8*> [#uses=1]
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%1 = call i8* @strcpy(i8* %buf1, i8* %0) nounwind ; <i8*> [#uses=0]
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%buf2 = bitcast [8 x i8]* %buf to i8* ; <i8*> [#uses=1]
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%2 = call i32 (i8*, ...) @printf(i8* getelementptr ([11 x i8], [11 x i8]* @"\01LC", i32 0, i32 0), i8* %buf2) nounwind ; <i32> [#uses=0]
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br label %return
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return: ; preds = %entry
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ret void
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}
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declare i8* @strcpy(i8*, i8*) nounwind
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declare i32 @printf(i8*, ...) nounwind
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