TableGen's regpressure: emit per-registerclass weight limits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154518 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2012-04-11 18:16:28 +00:00
parent 1835547ec1
commit ec14cd7ddc
4 changed files with 47 additions and 28 deletions

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@ -202,6 +202,13 @@ struct TargetRegisterInfoDesc {
bool inAllocatableClass; // Register belongs to an allocatable regclass.
};
/// Each TargetRegisterClass has a per register weight, and weight
/// limit which must be less than the limits of its pressure sets.
struct RegClassWeight {
unsigned RegWeigt;
unsigned WeightLimit;
};
/// TargetRegisterInfo base class - We assume that the target defines a static
/// array of TargetRegisterDesc objects that represent all of the machine
/// registers that the target has. As such, we simply have to track a pointer
@ -509,7 +516,8 @@ public:
}
/// Get the weight in units of pressure for this register class.
virtual unsigned getRegClassWeight(const TargetRegisterClass *RC) const = 0;
virtual const RegClassWeight &getRegClassWeight(
const TargetRegisterClass *RC) const = 0;
/// Get the number of dimensions of register pressure.
virtual unsigned getNumRegPressureSets() const = 0;

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@ -722,6 +722,16 @@ CodeGenRegisterClass::getSuperRegClasses(CodeGenSubRegIndex *SubIdx,
Out.set((*I)->EnumValue);
}
// Populate a unique sorted list of units from a register set.
void CodeGenRegisterClass::buildRegUnitSet(
std::vector<unsigned> &RegUnits) const {
std::vector<unsigned> TmpUnits;
for (RegUnitIterator UnitI(Members); UnitI.isValid(); ++UnitI)
TmpUnits.push_back(*UnitI);
std::sort(TmpUnits.begin(), TmpUnits.end());
std::unique_copy(TmpUnits.begin(), TmpUnits.end(),
std::back_inserter(RegUnits));
}
//===----------------------------------------------------------------------===//
// CodeGenRegBank
@ -1130,17 +1140,6 @@ void CodeGenRegBank::computeRegUnitWeights() {
}
}
// Populate a unique sorted list of units from a register set.
static void buildRegUnitSet(const CodeGenRegister::Set &Regs,
std::vector<unsigned> &RegUnits) {
std::vector<unsigned> TmpUnits;
for (RegUnitIterator UnitI(Regs); UnitI.isValid(); ++UnitI)
TmpUnits.push_back(*UnitI);
std::sort(TmpUnits.begin(), TmpUnits.end());
std::unique_copy(TmpUnits.begin(), TmpUnits.end(),
std::back_inserter(RegUnits));
}
// Find a set in UniqueSets with the same elements as Set.
// Return an iterator into UniqueSets.
static std::vector<RegUnitSet>::const_iterator
@ -1216,7 +1215,7 @@ void CodeGenRegBank::computeRegUnitSets() {
RegUnitSets.back().Name = RegClasses[RCIdx]->getName();
// Compute a sorted list of units in this class.
buildRegUnitSet(RegClasses[RCIdx]->getMembers(), RegUnitSets.back().Units);
RegClasses[RCIdx]->buildRegUnitSet(RegUnitSets.back().Units);
// Find an existing RegUnitSet.
std::vector<RegUnitSet>::const_iterator SetI =
@ -1279,7 +1278,7 @@ void CodeGenRegBank::computeRegUnitSets() {
// Recompute the sorted list of units in this class.
std::vector<unsigned> RegUnits;
buildRegUnitSet(RegClasses[RCIdx]->getMembers(), RegUnits);
RegClasses[RCIdx]->buildRegUnitSet(RegUnits);
// Don't increase pressure for unallocatable regclasses.
if (RegUnits.empty())

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@ -279,6 +279,9 @@ namespace llvm {
// getOrder(0).
const CodeGenRegister::Set &getMembers() const { return Members; }
// Populate a unique sorted list of units from a register set.
void buildRegUnitSet(std::vector<unsigned> &RegUnits) const;
CodeGenRegisterClass(CodeGenRegBank&, Record *R);
// A key representing the parts of a register class used for forming
@ -449,6 +452,15 @@ namespace llvm {
return RegUnitWeights[RUID];
}
// Get the sum of unit weights.
unsigned getRegUnitSetWeight(const std::vector<unsigned> &Units) const {
unsigned Weight = 0;
for (std::vector<unsigned>::const_iterator
I = Units.begin(), E = Units.end(); I != E; ++I)
Weight += getRegUnitWeight(*I);
return Weight;
}
// Increase a RegUnitWeight.
void increaseRegUnitWeight(unsigned RUID, unsigned Inc) {
RegUnitWeights[RUID] += Inc;

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@ -125,19 +125,23 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
unsigned NumSets = RegBank.getNumRegPressureSets();
OS << "/// Get the weight in units of pressure for this register class.\n"
<< "unsigned " << ClassName << "::\n"
<< "const RegClassWeight &" << ClassName << "::\n"
<< "getRegClassWeight(const TargetRegisterClass *RC) const {\n"
<< " static const unsigned RCWeightTable[] = {\n";
<< " static const RegClassWeight RCWeightTable[] = {\n";
for (unsigned i = 0, e = NumRCs; i != e; ++i) {
const CodeGenRegisterClass &RC = *RegBank.getRegClasses()[i];
const CodeGenRegister::Set &Regs = RC.getMembers();
if (Regs.empty())
OS << " 0";
else
OS << " " << (*Regs.begin())->getWeight(RegBank);
OS << ", \t// " << RC.getName() << "\n";
OS << " {0, 0";
else {
std::vector<unsigned> RegUnits;
RC.buildRegUnitSet(RegUnits);
OS << " {" << (*Regs.begin())->getWeight(RegBank)
<< ", " << RegBank.getRegUnitSetWeight(RegUnits);
}
OS << "}, \t// " << RC.getName() << "\n";
}
OS << " 0 };\n"
OS << " {0, 0} };\n"
<< " return RCWeightTable[RC->getID()];\n"
<< "}\n\n";
@ -153,12 +157,7 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
<< " static const unsigned PressureLimitTable[] = {\n";
for (unsigned i = 0; i < NumSets; ++i ) {
const RegUnitSet &RegUnits = RegBank.getRegPressureSet(i);
unsigned Weight = 0;
for (RegUnitSet::iterator
I = RegUnits.Units.begin(), E = RegUnits.Units.end(); I != E; ++I) {
Weight += RegBank.getRegUnitWeight(*I);
}
OS << " " << Weight
OS << " " << RegBank.getRegUnitSetWeight(RegUnits.Units)
<< ", \t// " << i << ": " << RegBank.getRegPressureSet(i).Name << "\n";
}
OS << " 0 };\n"
@ -668,7 +667,8 @@ RegisterInfoEmitter::runTargetHeader(raw_ostream &OS, CodeGenTarget &Target,
<< " const TargetRegisterClass *getMatchingSuperRegClass("
"const TargetRegisterClass*, const TargetRegisterClass*, "
"unsigned) const;\n"
<< " unsigned getRegClassWeight(const TargetRegisterClass *RC) const;\n"
<< " const RegClassWeight &getRegClassWeight("
<< "const TargetRegisterClass *RC) const;\n"
<< " unsigned getNumRegPressureSets() const;\n"
<< " unsigned getRegPressureSetLimit(unsigned Idx) const;\n"
<< " const int *getRegClassPressureSets("