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When setting the "unused" info, take into account something like this:
%r3<def> = OR %x3<kill>, %x3 We don't want to mark the %r3 as unused even though it's a sub-register of %x3. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48003 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -98,7 +98,7 @@ public:
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///
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void setUsed(unsigned Reg);
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void setUsed(BitVector Regs) { RegsAvailable &= ~Regs; }
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void setUnused(unsigned Reg);
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void setUnused(unsigned Reg, const MachineInstr *MI);
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void setUnused(BitVector Regs) { RegsAvailable |= Regs; }
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/// FindUnusedReg - Find a unused register of the specified register class
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@ -8,9 +8,9 @@
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//===----------------------------------------------------------------------===//
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//
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// This file implements the machine register scavenger. It can provide
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// information such as unused register at any point in a machine basic block.
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// It also provides a mechanism to make registers availbale by evicting them
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// to spill slots.
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// information, such as unused registers, at any point in a machine basic block.
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// It also provides a mechanism to make registers available by evicting them to
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// spill slots.
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//
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//===----------------------------------------------------------------------===//
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@ -25,6 +25,28 @@
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#include "llvm/ADT/STLExtras.h"
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using namespace llvm;
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/// RedefinesSuperRegPart - Return true if the specified register is redefining
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/// part of a super-register.
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static bool RedefinesSuperRegPart(const MachineInstr *MI, unsigned SubReg,
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const TargetRegisterInfo *TRI) {
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isRegister() || !MO.isUse())
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continue;
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if (TRI->isSuperRegister(SubReg, MO.getReg()))
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return true;
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}
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return false;
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}
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static bool RedefinesSuperRegPart(const MachineInstr *MI,
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const MachineOperand &MO,
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const TargetRegisterInfo *TRI) {
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assert(MO.isRegister() && MO.isDef() && "Not a register def!");
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return RedefinesSuperRegPart(MI, MO.getReg(), TRI);
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}
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/// setUsed - Set the register and its sub-registers as being used.
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void RegScavenger::setUsed(unsigned Reg) {
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RegsAvailable.reset(Reg);
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@ -35,12 +57,13 @@ void RegScavenger::setUsed(unsigned Reg) {
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}
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/// setUnused - Set the register and its sub-registers as being unused.
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void RegScavenger::setUnused(unsigned Reg) {
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void RegScavenger::setUnused(unsigned Reg, const MachineInstr *MI) {
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RegsAvailable.set(Reg);
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for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
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unsigned SubReg = *SubRegs; ++SubRegs)
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RegsAvailable.set(SubReg);
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if (!RedefinesSuperRegPart(MI, Reg, TRI))
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RegsAvailable.set(SubReg);
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}
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void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
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@ -138,9 +161,12 @@ void RegScavenger::forward() {
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if (MO.isKill() && !isReserved(Reg)) {
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ChangedRegs.set(Reg);
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// Mark sub-registers as changed if they aren't defined in the same
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// instruction.
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for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
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unsigned SubReg = *SubRegs; ++SubRegs)
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ChangedRegs.set(SubReg);
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if (!RedefinesSuperRegPart(MI, Reg, TRI))
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ChangedRegs.set(SubReg);
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}
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}
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@ -159,7 +185,7 @@ void RegScavenger::forward() {
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// If it's dead upon def, then it is now free.
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if (MO.isDead()) {
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setUnused(Reg);
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setUnused(Reg, MI);
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continue;
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}
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@ -169,6 +195,10 @@ void RegScavenger::forward() {
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continue;
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}
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// Skip is this is merely redefining part of a super-register.
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if (RedefinesSuperRegPart(MI, MO, TRI))
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continue;
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assert((isUnused(Reg) || isReserved(Reg)) &&
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"Re-defining a live register!");
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setUsed(Reg);
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@ -194,7 +224,7 @@ void RegScavenger::backward() {
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unsigned Reg = MO.getReg();
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assert(isUsed(Reg));
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if (!isReserved(Reg))
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setUnused(Reg);
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setUnused(Reg, MI);
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}
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// Process uses.
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