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[ARM] Register ARMPreAllocLoadStoreOpt pass with LLVM pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247791 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1842,12 +1842,21 @@ bool ARMLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
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return Modified;
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}
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namespace llvm {
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void initializeARMPreAllocLoadStoreOptPass(PassRegistry &);
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}
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#define ARM_PREALLOC_LOAD_STORE_OPT_NAME \
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"ARM pre- register allocation load / store optimization pass"
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namespace {
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/// Pre- register allocation pass that move load / stores from consecutive
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/// locations close to make it more likely they will be combined later.
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struct ARMPreAllocLoadStoreOpt : public MachineFunctionPass{
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static char ID;
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ARMPreAllocLoadStoreOpt() : MachineFunctionPass(ID) {}
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ARMPreAllocLoadStoreOpt() : MachineFunctionPass(ID) {
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initializeARMPreAllocLoadStoreOptPass(*PassRegistry::getPassRegistry());
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}
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const DataLayout *TD;
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const TargetInstrInfo *TII;
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@ -1859,7 +1868,7 @@ namespace {
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bool runOnMachineFunction(MachineFunction &Fn) override;
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const char *getPassName() const override {
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return "ARM pre- register allocation load / store optimization pass";
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return ARM_PREALLOC_LOAD_STORE_OPT_NAME;
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}
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private:
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@ -1878,6 +1887,9 @@ namespace {
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char ARMPreAllocLoadStoreOpt::ID = 0;
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}
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INITIALIZE_PASS(ARMPreAllocLoadStoreOpt, "arm-prera-load-store-opt",
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ARM_PREALLOC_LOAD_STORE_OPT_NAME, false, false)
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bool ARMPreAllocLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
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TD = &Fn.getDataLayout();
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STI = &static_cast<const ARMSubtarget &>(Fn.getSubtarget());
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