added setRegForValue to MachineOperand class

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@591 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ruchira Sasanka 2001-09-15 19:07:45 +00:00
parent 0931a01f57
commit ed8f674b9a

View File

@ -345,7 +345,31 @@ ChooseRegOrImmed(Value* val,
void
PrintMachineInstructions(const Method* method)
PrintMachineInstructions(const Method *const method)
{
cout << "\n" << method->getReturnType()
<< " \"" << method->getName() << "\"" << endl;
for (Method::const_iterator BI = method->begin(); BI != method->end(); ++BI)
{
BasicBlock* bb = *BI;
cout << "\n"
<< (bb->hasName()? bb->getName() : "Label")
<< " (" << bb << ")" << ":"
<< endl;
MachineCodeForBasicBlock& mvec = bb->getMachineInstrVec();
for (unsigned i=0; i < mvec.size(); i++)
cout << "\t" << *mvec[i] << endl;
}
cout << endl << "End method \"" << method->getName() << "\""
<< endl << endl;
}
#if 0
void PrintMachineInstructions(Method * method)
{
cout << "\n" << method->getReturnType()
<< " \"" << method->getName() << "\"" << endl;
@ -365,3 +389,4 @@ PrintMachineInstructions(const Method* method)
cout << endl << "End method \"" << method->getName() << "\""
<< endl << endl;
}
#endif